| Commit message (Expand) | Author | Age |
|---|
| * | Disable the load/store optimization pass for Thumb-1. | James Molloy | 2014-06-12 |
| * | [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 |
| * | [mips][mips64r6] bc2[ft] are not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 |
| * | [mips][mips64r6] [sl][duw]xc1 are not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 |
| * | [mips][mips64r6] prefx is not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 |
| * | [mips][mips64r6] 80 col corrections that should have been in r210777. | Daniel Sanders | 2014-06-12 |
| * | [mips][mips64r6] c.cond.fmt, mov[fntz], and mov[fntz].[ds] are not available ... | Daniel Sanders | 2014-06-12 |
| * | [mips][mips64r6] jalx is not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 |
| * | [mips][mips64r6] Add R_MIPS_PC19_S2 | Zoran Jovanovic | 2014-06-12 |
| * | [mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and ... | Daniel Sanders | 2014-06-12 |
| * | [mips][mips64r6] Add bgec and bgeuc instructions | Zoran Jovanovic | 2014-06-12 |
| * | [X86] Teach how to dump the name of target node RDTSCP_DAG. | Andrea Di Biagio | 2014-06-12 |
| * | [mips][mips64r6] madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are not ava... | Daniel Sanders | 2014-06-12 |
| * | [mips][mips64r6] madd/maddu/msub/msubu are not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 |
| * | [X86] Teach how to combine AVX and AVX2 horizontal binop on packed 256-bit ve... | Andrea Di Biagio | 2014-06-12 |
| * | [mips][mips64r6] Replace m[tf]hi, m[tf]lo, mult, multu, dmult, dmultu, div, d... | Daniel Sanders | 2014-06-12 |
| * | R600/SI: Use a register set to -1 for data0 on ds_inc*/ds_dec* | Matt Arsenault | 2014-06-12 |
| * | [FastISel][X86] Add support for the sqrt intrinsic. | Juergen Ributzka | 2014-06-11 |
| * | [FastIsel][X86] Add support for lowering the first 8 floating-point arguments. | Juergen Ributzka | 2014-06-11 |
| * | [FastISel][X86] Add support for the frameaddress intrinsic. | Juergen Ributzka | 2014-06-11 |
| * | [AArch64] Basic Sched Model for Cortex-A57. | Chad Rosier | 2014-06-11 |
| * | R600: Set correct InstrItinClass for instructions using *Helper classes | Tom Stellard | 2014-06-11 |
| * | R600: BCNT_INT is a vector only instruction | Tom Stellard | 2014-06-11 |
| * | ARM: honor hex immediate formatting for ldr/str i12 offsets. | Jim Grosbach | 2014-06-11 |
| * | R600/SI: Fix bitcast between v2i32 and f64 | Matt Arsenault | 2014-06-11 |
| * | R600/SI: Update place using old subtarget predicate | Matt Arsenault | 2014-06-11 |
| * | R600/SI: Add common 64-bit LDS atomics | Matt Arsenault | 2014-06-11 |
| * | R600/SI: Add instruction definitions for 64-bit LDS atomics | Matt Arsenault | 2014-06-11 |
| * | R600/SI: Add 32-bit LDS atomic cmpxchg | Matt Arsenault | 2014-06-11 |
| * | R600/SI: Use LDS atomic inc / dec | Matt Arsenault | 2014-06-11 |
| * | R600/SI: Add other LDS atomic operations | Matt Arsenault | 2014-06-11 |
| * | R600/SI: Add instruction definitions for more LDS ops | Matt Arsenault | 2014-06-11 |
| * | R600/SI: Fix backwards names for local atomic instructions. | Matt Arsenault | 2014-06-11 |
| * | R600/SI: Refactor local atomics. | Matt Arsenault | 2014-06-11 |
| * | R600/SI: Use v_cvt_f32_ubyte* instructions | Matt Arsenault | 2014-06-11 |
| * | R600/SI: Fix selection failure on scalar_to_vector | Matt Arsenault | 2014-06-11 |
| * | X86: add stringy name for X86ISD::LCMPXCHG16_DAG | Tim Northover | 2014-06-11 |
| * | [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register ... | Matheus Almeida | 2014-06-11 |
| * | Add AVX512 masked leadz instrinsic support. | Cameron McInally | 2014-06-11 |
| * | [X86] Refactor the logic to select horizontal adds/subs to a helper function. | Andrea Di Biagio | 2014-06-11 |
| * | Try to fix the msvc build. | Rafael Espindola | 2014-06-11 |
| * | Use cast instead of assert + dyn_cast | Matt Arsenault | 2014-06-11 |
| * | R600: Add helper functions. | Matt Arsenault | 2014-06-11 |
| * | Remove duplicate copy of InstrItineraryData from the TargetMachine, | Eric Christopher | 2014-06-11 |
| * | Move to a private function to initialize the subtarget dependencies | Eric Christopher | 2014-06-11 |
| * | Move to a private function to initialize the subtarget dependencies | Eric Christopher | 2014-06-11 |
| * | [FastISel][X86] Extend support for {s|u}{add|sub|mul}.with.overflow intrinsics. | Juergen Ributzka | 2014-06-10 |
| * | Use unique_ptr for X86Subtarget pointer members. | Eric Christopher | 2014-06-10 |
| * | Move AArch64TargetLowering to AArch64Subtarget. | Eric Christopher | 2014-06-10 |
| * | Move AArch64InstrInfo to AArch64Subtarget. | Eric Christopher | 2014-06-10 |
