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* implicit_def_vrrc doesn't generate code.Chris Lattner2006-11-16
* Correct instructions for moving data between GR64 and SSE registers; also cor...Evan Cheng2006-11-16
* Fix a potential bug: MOVPDI2DI, etc. are not copy instructions.Evan Cheng2006-11-16
* This is a general clean up of the PowerPC ABI. Address several problems andJim Laskey2006-11-16
* fix a regression that I introduced. stdu should scale the offset by 4Chris Lattner2006-11-16
* Align stubs on 4 byte boundary. This fixes 447.dealII.Evan Cheng2006-11-16
* add a statisticChris Lattner2006-11-16
* fix broken encodingChris Lattner2006-11-16
* add ppc64 r+i stores with update.Chris Lattner2006-11-16
* add patterns for ppc32 preinc stores. ppc64 next.Chris Lattner2006-11-16
* switch these back to the 'bad old way'Chris Lattner2006-11-16
* Fix ppc64 epilog bug.Chris Lattner2006-11-15
* Stop using isTwoAddress, switching to operand constraints instead.Chris Lattner2006-11-15
* add a new field needed by the code emitter generator.Chris Lattner2006-11-15
* Properly transfer kill / dead info.Evan Cheng2006-11-15
* Kill / dead info has been moved to MI's.Evan Cheng2006-11-15
* commuteInstruction should propagate kill / dead info.Evan Cheng2006-11-15
* fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memriChris Lattner2006-11-15
* Simplify IntrinsicLowering and clarify that it is only for use by theChris Lattner2006-11-15
* Remove unneeded forward declsChris Lattner2006-11-15
* Fix the PPC regressions last nightChris Lattner2006-11-15
* Switch loads over to use memri as the operand instead of a reg/imm operandChris Lattner2006-11-15
* Revert. This wasn't meant to be checked in.Evan Cheng2006-11-14
* group load and store instructions together. No functionality change.Chris Lattner2006-11-14
* Fix predicates for unindexed stores so they don't accidentally match indexedChris Lattner2006-11-14
* Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 callsChris Lattner2006-11-14
* remove a ton of custom selection logic no longer neededChris Lattner2006-11-14
* it would be nice of ctlz were lowered to bsf etc.Chris Lattner2006-11-14
* lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead ofChris Lattner2006-11-14
* add a noteChris Lattner2006-11-14
* minor tweaks, reject vector preinc.Chris Lattner2006-11-14
* Matches MachineInstr changes.Evan Cheng2006-11-13
* teach the g5 hazard recognizer about update loads. This fixesChris Lattner2006-11-13
* Cute example from Chris Lattner.Nick Lewycky2006-11-13
* Make sure stack link is set in 64-bit.Jim Laskey2006-11-11
* implement proper PPC64 prolog/epilog codegen.Chris Lattner2006-11-11
* Running with frame pointers prevented debugging, external probes andJim Laskey2006-11-11
* Add implicit use / def operands to created MI's.Evan Cheng2006-11-11
* Add all implicit defs to FP_REG_KILL mi.Evan Cheng2006-11-11
* allow the offset of a preinc'd load to be the low-part of a global. ThisChris Lattner2006-11-11
* Mark operands as symbol lo instead of imm32 so that they print lo(x) aroundChris Lattner2006-11-11
* ppc64 doesn't have lwau, don't attempt to form it.Chris Lattner2006-11-11
* implement preinc support for r+i loads on ppc64Chris Lattner2006-11-10
* Add a note.Evan Cheng2006-11-10
* These are done.Evan Cheng2006-11-10
* Don't dag combine floating point select to max and min intrinsics. ThoseEvan Cheng2006-11-10
* Fix a bug in SelectScalarSSELoad. Since the load is wrapped in aEvan Cheng2006-11-10
* dform 8/9 are identical to dform 1Chris Lattner2006-11-10
* Fix a potential bug.Evan Cheng2006-11-10
* Add implicit def / use operands to MachineInstr.Evan Cheng2006-11-10
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