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* Initial support for the CMake build system.Oscar Fuentes2008-09-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56419 91177308-0d34-0410-b5e6-96231b3b80d8
* Add helper function to get a 32-bit floating point constant. No ↵Bill Wendling2008-09-22
| | | | | | functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56418 91177308-0d34-0410-b5e6-96231b3b80d8
* Fold immediates into X86 shifts with fast isel. This generates:Chris Lattner2008-09-21
| | | | | | | | | | | | | | | sarl $3, %ecx instead of: movl $3, %ecx sarl %cl, %edx This shrinks fast isel 176.gcc by about 2000 instructions (.3%) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56413 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out code into HandleVirtRegDef, for consistency withDan Gohman2008-09-21
| | | | | | | | Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check for register zero, and redundant checks for isPhysicalRegister. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56412 91177308-0d34-0410-b5e6-96231b3b80d8
* Instead of building a list and sorting it just to find a maximum element,Dan Gohman2008-09-21
| | | | | | | compute the maximum element directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56411 91177308-0d34-0410-b5e6-96231b3b80d8
* Fetch the starting index of the block when assigning intervals. This gets ↵Owen Anderson2008-09-21
| | | | | | | | | live-in indices correct in the presence of things like EH labels. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56410 91177308-0d34-0410-b5e6-96231b3b80d8
* don't print GlobalAddressSDNode's with an offset of zero as "foo0".Chris Lattner2008-09-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56399 91177308-0d34-0410-b5e6-96231b3b80d8
* add a noteChris Lattner2008-09-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56391 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement review feedback from Devang: make useDuncan Sands2008-09-20
| | | | | | | of mayReadFromMemory and mayWriteToMemory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56387 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach coalescer about earlyclobber bits.Dale Johannesen2008-09-20
| | | | | | | | Check bits for preferred register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56384 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR2808. When regalloc runs out of register, it spill a physical register ↵Evan Cheng2008-09-20
| | | | | | around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56381 91177308-0d34-0410-b5e6-96231b3b80d8
* No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it.Evan Cheng2008-09-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56378 91177308-0d34-0410-b5e6-96231b3b80d8
* 80 column violation.Evan Cheng2008-09-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56377 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a FastISel GlobalVariable CSE bug.Dan Gohman2008-09-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56376 91177308-0d34-0410-b5e6-96231b3b80d8
* Continue after removing the current MI.Evan Cheng2008-09-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56372 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor X86SelectConstAddr, folding it into X86SelectAddress. ThisDan Gohman2008-09-19
| | | | | | | | results in better code for globals. Also, unbreak the local CSE for GlobalValue stub loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56371 91177308-0d34-0410-b5e6-96231b3b80d8
* Make earlyclobber stuff work when virtual regsDale Johannesen2008-09-19
| | | | | | | | have previously been assigned conflicting physreg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56364 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-materalized definition instructions may be dead. Whack them.Evan Cheng2008-09-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56352 91177308-0d34-0410-b5e6-96231b3b80d8
* backing out my last commit, it was not intended to go on the trunkGabor Greif2008-09-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56349 91177308-0d34-0410-b5e6-96231b3b80d8
* first shot at removing Use::ValGabor Greif2008-09-19
| | | | | | untested, Use::swap() is definitely not done yet git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56348 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the MarkModRef pass (use AddReadAttrs instead).Duncan Sands2008-09-19
| | | | | | | | | Unfortunately this means removing one regression test of GlobalsModRef because I couldn't work out how to perform it without MarkModRef. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56342 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new pass AddReadAttrs which works out which functionsDuncan Sands2008-09-19
| | | | | | | | | | can get the readnone/readonly attributes, and gives them it. The plan is to remove markmodref (which did the same thing by querying GlobalsModRef) and delete the analogous functionality from GlobalsModRef. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56341 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysisDale Johannesen2008-09-19
| | | | | | | | | and redo as linked list walk. Logic moved into RA. Per review feedback. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56326 91177308-0d34-0410-b5e6-96231b3b80d8
* splitLoop does not handle split condition EQ.Devang Patel2008-09-18
| | | | | | | Fixes PR 2805 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56321 91177308-0d34-0410-b5e6-96231b3b80d8
* Address-mode folding for X86FastISel. It's pretty basic, but itDan Gohman2008-09-18
| | | | | | | | | catches a fair number of common cases. Note that this currently causes Fast-ISel to leave behind lots of dead instructions. Those will be dealt with in subsequent commits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56320 91177308-0d34-0410-b5e6-96231b3b80d8
* Decrementing the iterator here could be wrong if the worklist is empty after ↵Bill Wendling2008-09-18
| | | | | | | | | the "erase". Thanks to Ji Young Park for the patch! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56316 91177308-0d34-0410-b5e6-96231b3b80d8
* Try to place hoisted instructions befoe icmp instruction.Devang Patel2008-09-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56315 91177308-0d34-0410-b5e6-96231b3b80d8
* Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo.Evan Cheng2008-09-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56314 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify this code. The FastISel class has its own TD member.Dan Gohman2008-09-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56311 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't consider instructions with implicit physical registerDan Gohman2008-09-18
| | | | | | | defs to be necessarily live. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56310 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new "fast" scheduler. This is currently basically just aDan Gohman2008-09-18
| | | | | | | | | | | | | | | | | copy of the BURRList scheduler, but with several parts ripped out, such as backtracking, online topological sort maintenance (needed by backtracking), the priority queue, and Sethi-Ullman number computation and maintenance (needed by the priority queue). As a result of all this, it generates somewhat lower quality code, but that's its tradeoff for running about 30% faster than list-burr in -fast mode in many cases. This is somewhat experimental. Moving forward, major pieces of this can be refactored with pieces in common with ScheduleDAGRRList.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56307 91177308-0d34-0410-b5e6-96231b3b80d8
* Preliminary support for systems which require changing JIT memory regions ↵Evan Cheng2008-09-18
| | | | | | privilege from read / write to read / executable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56303 91177308-0d34-0410-b5e6-96231b3b80d8
* Duh. Default to ARMCC::AL (always).Evan Cheng2008-09-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56301 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up.Evan Cheng2008-09-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56300 91177308-0d34-0410-b5e6-96231b3b80d8
* Cosmetic.Evan Cheng2008-09-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56299 91177308-0d34-0410-b5e6-96231b3b80d8
* FastISel: For calls, prefer using the callee's address as a constantDan Gohman2008-09-17
| | | | | | | | | | | | | over having it in a register. And wait until after checking type legality before requesting that the callee address be placed in a register. Also, fix support for calls with void return type. This speeds up fast-isel isel time by about 15% and reduces instruction counts by about 3% overall on certain testcases. It also changes many indirect calls to direct calls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56292 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a bit to mark operands of asm's that conflictDale Johannesen2008-09-17
| | | | | | | | | | | with an earlyclobber operand elsewhere. Propagate this bit and the earlyclobber bit through SDISel. Change linear-scan RA not to allocate regs in a way that conflicts with an earlyclobber. See also comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
* Unallocatable registers do not have live intervals.Evan Cheng2008-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56287 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not hoist instruction above branch condition. The instruction may use ↵Devang Patel2008-09-17
| | | | | | branch condition. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56286 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not ignore iv uses outside the loop.Devang Patel2008-09-17
| | | | | | | This one slipped through cracks very well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56284 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't worry about clobbering physical register defs that aren't used.Dan Gohman2008-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56281 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix addrmode1 instruction encodings; fix bx_ret encoding.Evan Cheng2008-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56277 91177308-0d34-0410-b5e6-96231b3b80d8
* Specify instruction encoding using range list to avoid endianess issues.Evan Cheng2008-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56276 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and drawDan Gohman2008-09-17
| | | | | | | | up some new ascii art to illustrate what it does. This change currently has no effect on generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56270 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new MachineInstr-level DCE pass. It is very simple, and is intended toDan Gohman2008-09-17
| | | | | | | be used with fast-isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56268 91177308-0d34-0410-b5e6-96231b3b80d8
* Add trampoline support to PPC. GCC simply calls the "__trampoline_setup"Bill Wendling2008-09-17
| | | | | | | function with appropriate parameters. This allows us to support blocks on PPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56267 91177308-0d34-0410-b5e6-96231b3b80d8
* When converting a CopyFromReg to a copy instruction, use the register class ↵Evan Cheng2008-09-16
| | | | | | of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56258 91177308-0d34-0410-b5e6-96231b3b80d8
* Change SelectionDAG::getConstantPool to always set the alignment of theDan Gohman2008-09-16
| | | | | | | | | | | | | | | | | | | | | ConstantPoolSDNode, using the target's preferred alignment for the constant type. In LegalizeDAG, when performing loads from the constant pool, the ConstantPoolSDNode's alignment is used in the calls to getLoad and getExtLoad. This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly choosing the ABI alignment for constant pool loads when Alignment == 0. The incorrect alignment is only a performance issue when ABI alignment does not equal preferred alignment (i.e., on x86 it was generating MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI alignment for 128bit vectors is forced to 1 byte.) Patch by Paul Redmond! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56253 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-16
| | | | | | | Apologies for the thrashing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
* Include the alignment value when displaying ConstantPoolSDNodes.Dan Gohman2008-09-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56250 91177308-0d34-0410-b5e6-96231b3b80d8
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