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* misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles.Andrew Trick2012-03-07
* ScheduleDAGInstrs commentsAndrew Trick2012-03-07
* misched preparation: modularize schedule emission.Andrew Trick2012-03-07
* misched preparation: modularize schedule printing.Andrew Trick2012-03-07
* misched preparation: modularize schedule verification.Andrew Trick2012-03-07
* whitespaceAndrew Trick2012-03-07
* Switch this code to use hash_combine_range rather than incremental callsChandler Carruth2012-03-07
* Cache the sized-ness of struct types, once we reach the steady state ofChandler Carruth2012-03-07
* No functionality change. Type::isSized() can be expensive, so avoid calling itNick Lewycky2012-03-07
* ARM pre-v6 assembly parsing for umull/smull.Jim Grosbach2012-03-07
* ARM pre-v6 alias for 'nop' to 'mov r0, r0'Jim Grosbach2012-03-07
* Tidy up. Remove dead code that slipped into previous commit.Jim Grosbach2012-03-07
* Added -view-background to avoid waiting for each GraphViz invocation.Andrew Trick2012-03-07
* Added -view-misched=dags options.Andrew Trick2012-03-07
* Cleanup in preparation for misched: Move DAG visualization logic.Andrew Trick2012-03-07
* Added MachineBasicBlock::getFullName() to standardize/factor codegen diagnost...Andrew Trick2012-03-07
* whitespaceAndrew Trick2012-03-07
* Cleanup: DAG building is specific to either SD or MI scheduling. Not part of ...Andrew Trick2012-03-07
* misched commentsAndrew Trick2012-03-07
* misched: Use the StartBlock/FinishBlock hooksAndrew Trick2012-03-07
* Add the DW_AT_APPLE_runtime_class attribute to forward declarationsEric Christopher2012-03-07
* Extend r148086 to check for [r +/- reg] address mode. This fixes queens perfo...Evan Cheng2012-03-06
* ARM more NEON VLD/VST composite physical register refactoring.Jim Grosbach2012-03-06
* Hoist common code out of if statement.Jakob Stoklund Olesen2012-03-06
* ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach2012-03-06
* SmallPtrSet: Provide a more efficient implementation of swap than the default...Benjamin Kramer2012-03-06
* Fix the operand ordering on aliases for shld and shrd. PR12173, part 2.Eli Friedman2012-03-06
* Tidy up. Kill some dead code.Jim Grosbach2012-03-06
* Allow the same types in DPair as in QPR.Jakob Stoklund Olesen2012-03-06
* Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction.Kevin Enderby2012-03-06
* Convert PowerPC to register mask operands.Roman Divacky2012-03-06
* Change ConstantAggrUniqueMap to use Chandler's new hashingJay Foad2012-03-06
* Add <imp-def> operands when reloading into physregs.Jakob Stoklund Olesen2012-03-06
* Avoid finalizeBundles infinite looping.Evan Cheng2012-03-06
* Make it possible for a target to mark FSUB as Expand. This requires providin...Owen Anderson2012-03-06
* Split fpscr into two registers: FPSCR and FPSCR_NZCV.Lang Hames2012-03-06
* A few more cases of missing masking in ComputeMaskedBits; found by inspection.Eli Friedman2012-03-05
* ARM vpush/vpop assembler mnemonics accept an optional size suffix.Jim Grosbach2012-03-05
* Make sure we don't return bits outside the mask in ComputeMaskedBits. PR12189.Eli Friedman2012-03-05
* ARM Refactor VLD/VST spaced pair instructions.Jim Grosbach2012-03-05
* ARM Remove a bit of dead code.Jim Grosbach2012-03-05
* ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach2012-03-05
* Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach2012-03-05
* Fix warnings about adding a bool to a string.Bill Wendling2012-03-05
* Address Evan's comments for r151877.Chad Rosier2012-03-05
* updated patch for the ARM fused multiply add/subSebastian Pop2012-03-05
* fix typosSebastian Pop2012-03-05
* remove spaces on empty linesSebastian Pop2012-03-05
* This is not a common case, in fact it never happens!Duncan Sands2012-03-05
* Switch mem2reg to use the new hashing infrastructure.Chandler Carruth2012-03-05