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* More fixes and improvements to MachO relocation pretty-printing, particular f...Owen Anderson2011-10-24
* Don't crash on variable insertelement on ARM. PR10258.Eli Friedman2011-10-24
* Check the visibility of the global variable before placing it into the stubsBill Wendling2011-10-24
* ARMConstantPoolMBB::print should print BB number.Evan Cheng2011-10-24
* ARM assembly parsing and encoding for VLD1 w/ writeback.Jim Grosbach2011-10-24
* ARM refactor am6offset usage for VLD1.Jim Grosbach2011-10-24
* Get relocation parsing/dumping to a mostly-working state for MachO files.Owen Anderson2011-10-24
* Now that we look at all the header PHIs, we need to consider all the header PHIsNick Lewycky2011-10-24
* Add support to the old JIT for acquire/release loads and stores on x86. PR11...Eli Friedman2011-10-24
* Stub out some of the MachO relocation decoding hooks.Owen Anderson2011-10-24
* Really unbreak CMake buildDouglas Gregor2011-10-24
* Unbreak CMake buildDouglas Gregor2011-10-24
* Fix a NEON disassembly case that was broken in the recent refactorings. As m...Owen Anderson2011-10-24
* Delete the top-down "Latency" scheduler. Top-down scheduling doesn't handleDan Gohman2011-10-24
* Delete the Latency scheduling preference.Dan Gohman2011-10-24
* Change this overloaded use of Sched::Latency to be an overloadedDan Gohman2011-10-24
* Remove the explicit request for "Latency" scheduling from MSP430,Dan Gohman2011-10-24
* Change the default scheduler from Latency to ILP, since LatencyDan Gohman2011-10-24
* Thumb2 LDM instructions can target PC. Make sure to encode it.Jim Grosbach2011-10-24
* Cleanup. Get rid of the old SjLj EH lowering code. No functionality change.Bill Wendling2011-10-24
* Sink an otherwise unused variable's initializer into the asserts thatChandler Carruth2011-10-24
* Remove return heuristics from the static branch probabilities, andChandler Carruth2011-10-24
* Reapply r142781 with fix. Original message:Nick Lewycky2011-10-24
* PHI nodes not in the loop header aren't part of the loop iteration initialNick Lewycky2011-10-24
* A dead malloc, a free(NULL) and a free(undef) are all trivially deadNick Lewycky2011-10-24
* Speculatively revert r142781. Bots are showingNick Lewycky2011-10-24
* Windows/Path.inc: [PR8460] Get rid of ScopedNullTerminator. Thanks to Zvi Rac...NAKAMURA Takumi2011-10-24
* Simplify the design of BranchProbabilityInfo by collapsing it intoChandler Carruth2011-10-24
* Enhance SCEV's brute force loop analysis to handle multiple PHI nodes in theNick Lewycky2011-10-23
* Tidy up a loop to be more idiomatic for LLVM's codebase, and remove someChandler Carruth2011-10-23
* Add X86 SARX, SHRX, and SHLX instructions.Craig Topper2011-10-23
* Teach the BranchProbabilityInfo pass to print its results, and use thatChandler Carruth2011-10-23
* Now that we have comparison on probabilities, add some static functionsChandler Carruth2011-10-23
* Remove a commented out line of code that snuck by my auditing.Chandler Carruth2011-10-23
* Print branch probabilities as percentages.Benjamin Kramer2011-10-23
* Add compare operators to BranchProbability and use it to determine if an edge...Benjamin Kramer2011-10-23
* Completely re-write the algorithm behind MachineBlockPlacement based onChandler Carruth2011-10-23
* Add X86 RORX instructionCraig Topper2011-10-23
* The element insertion code in scalar replacement doesn't handle incorrectCameron Zwarich2011-10-23
* Add X86 MULX instruction for disassembler.Craig Topper2011-10-23
* Remove some duplicate specifying of neverHasSideEffects and mayLoad from X86 ...Craig Topper2011-10-22
* A non-escaping malloc in the entry block is not unlike an alloca. Do dead-storeNick Lewycky2011-10-22
* Make SCEV's brute force analysis stronger in two ways. Firstly, we should beNick Lewycky2011-10-22
* Move various generated tables into read-only memory, fixing up const correctn...Benjamin Kramer2011-10-22
* Fix pr11193.Nadav Rotem2011-10-22
* The different flavors of ARM have different valid subsets of registers. CheckBill Wendling2011-10-22
* Assembly parsing for 4-register sequential variant of VLD2.Jim Grosbach2011-10-21
* Assembly parsing for 2-register sequential variant of VLD2.Jim Grosbach2011-10-21
* Make sure that the landing pads themselves have no PHI instructions in them.Bill Wendling2011-10-21
* Extend the floating point heuristic to consider NaN checks unlikely.Benjamin Kramer2011-10-21