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* [PM] Wire up support for writing bitcode with new PM.Chandler Carruth2014-01-13
| | | | | | | | | | This moves the old pass creation functionality to its own header and updates the callers of that routine. Then it adds a new PM supporting bitcode writer to the header file, and wires that up in the opt tool. A test is added that round-trips code into bitcode and back out using the new pass manager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199078 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64 NEON] Add missing patterns for bitcast from or to v1f64Kevin Qin2014-01-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199070 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64 NEON] Add more scenarios to use perm instructions when lowering ↵Kevin Qin2014-01-13
| | | | | | | | | | | | | | | | shuffle_vector This patch covered 2 more scenarios: 1. Two operands of shuffle_vector are the same, like %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2. One of operands is undef, like %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> After this patch, perm instructions will have chance to be emitted instead of lots of INS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199069 91177308-0d34-0410-b5e6-96231b3b80d8
* correct target directive handling error handlingSaleem Abdulrasool2014-01-13
| | | | | | | | | | | | | | The target specific parser should return `false' if the target AsmParser handles the directive, and `true' if the generic parser should handle the directive. Many of the target specific directive handlers would `return Error' which does not follow these semantics. This change simply changes the target specific routines to conform to the semantis of the ParseDirective correctly. Conformance to the semantics improves diagnostics emitted for the invalid directives. X86 is taken as a sample to ensure that multiple diagnostics are not presented for a single error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199068 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle bundled terminators in isBlockOnlyReachableByFallthrough.Jakob Stoklund Olesen2014-01-12
| | | | | | | | | | Targets like SPARC and MIPS have delay slots and normally bundle the delay slot instruction with the corresponding terminator. Teach isBlockOnlyReachableByFallthrough to find any MBB operands on bundled terminators so SPARC doesn't need to specialize this function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199061 91177308-0d34-0410-b5e6-96231b3b80d8
* raw_fd_ostream: Don't change STDERR to O_BINARY, or w*printf() (in assert()) ↵NAKAMURA Takumi2014-01-12
| | | | | | would barf wide chars after llvm::errs(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199057 91177308-0d34-0410-b5e6-96231b3b80d8
* raw_stream formatter: [Win32] Use std::signbit() if available, instead of ↵NAKAMURA Takumi2014-01-12
| | | | | | | | _fpclass(). FIXME: It should be generic to C++11. For now, it is dedicated to mingw-w64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199052 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix non-deterministic SDNodeOrder-dependent codegenNico Rieck2014-01-12
| | | | | | | Reset SelectionDAGBuilder's SDNodeOrder to ensure deterministic code generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199050 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Add module and function printing passes for the new pass manager.Chandler Carruth2014-01-12
| | | | | | | | | This implements the legacy passes in terms of the new ones. It adds basic testing using explicit runs of the passes. Next up will be wiring the basic output mechanism of opt up when the new pass manager is engaged unless bitcode writing is requested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199049 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Simplify the IR printing passes significantly now that a narrowerChandler Carruth2014-01-12
| | | | | | | | | | API is exposed. This removes the support for deleting the ostream, switches the member and constructor order arround to be consistent with the creation routines, and switches to using references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199047 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Simplify the interface exposed for IR printing passes.Chandler Carruth2014-01-12
| | | | | | | | | | | | Nothing was using the ability of the pass to delete the raw_ostream it printed to, and nothing was trying to pass it a pointer to the raw_ostream. Also, the function variant had a different order of arguments from all of the others which was just really confusing. Now the interface accepts a reference, doesn't offer to delete it, and uses a consistent order. The implementation of the printing passes haven't been updated with this simplification, this is just the API switch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199044 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Run clang-format and remove redundant or obvious comments beforeChandler Carruth2014-01-12
| | | | | | | the heavy factoring needed to share logic between the new pass manager and the old. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199043 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Rename the IR printing pass header to a more generic and correctChandler Carruth2014-01-12
| | | | | | | | name to match the source file which I got earlier. Update the include sites. Also modernize the comments in the header to use the more recommended doxygen style. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199041 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: fix diagnostics of improper qualificationSaleem Abdulrasool2014-01-12
| | | | | | | | An improper qualifier would result in a superfluous error due to the parser not consuming the remainder of the statement. Simply consume the remainder of the statement to avoid the error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199035 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for parsing floating point instructions.Venkatraman Govindaraju2014-01-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199033 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: change implicit immediate forms of {ld,st}r{,b}t to psuedo-instructionsSaleem Abdulrasool2014-01-12
| | | | | | | | | | | | | The implicit immediate 0 forms are assembly aliases, not distinct instruction encodings. Fix the initial implementation introduced in r198914 to an alias to avoid two separate instruction definitions for the same encoding. An InstAlias is insufficient in this case as the necessary due to the need to add a new additional operand for the implicit zero. By using the AsmPsuedoInst, fall back to the C++ code to transform the instruction to the equivalent _POST_IMM form, inserting the additional implicit immediate 0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199032 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Replace (unsigned)-1 with ~OU as suggested by Reid Kleckner.Venkatraman Govindaraju2014-01-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199031 91177308-0d34-0410-b5e6-96231b3b80d8
* The SPARCv9 ABI returns a float in %f0.Jakob Stoklund Olesen2014-01-12
| | | | | | | | | | | | | | | This is different from the argument passing convention which puts the first float argument in %f1. With this patch, all returned floats are treated as if the 'inreg' flag were set. This means multiple float return values get packed in %f0, %f1, %f2, ... Note that when returning a struct in registers, clang will set the 'inreg' flag on the return value, so that behavior is unchanged. This also happens when returning a float _Complex. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199028 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing mul aliases for armv4 support. Add checks that armv4 canJoerg Sonnenberger2014-01-12
| | | | | | | assemble the various mul instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199026 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch-to-lookup tables: Don't require a result for the defaultHans Wennborg2014-01-12
| | | | | | | | | | | | | | | | | | | | | | | case when the lookup table doesn't have any holes. This means we can build a lookup table for switches like this: switch (x) { case 0: return 1; case 1: return 2; case 2: return 3; case 3: return 4; default: exit(1); } The default case doesn't yield a constant result here, but that doesn't matter, since a default result is only necessary for filling holes in the lookup table, and this table doesn't have any holes. This makes us transform 505 more switches in a clang bootstrap, and shaves 164 KB off the resulting clang binary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199025 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add missing processor types: v7 and niagaraVenkatraman Govindaraju2014-01-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199024 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support emitting constant values in target expressionsSaleem Abdulrasool2014-01-11
| | | | | | | | A 32-bit immediate value can be formed from a constant expression and loaded into a register. Add support to emit this into an object file. Because this value is a constant, a relocation must *not* be produced for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199023 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorizer: Enable strided memory accesses versioning per defaultArnold Schwaighofer2014-01-11
| | | | | | | | I saw no compile or execution time regressions on x86_64 -mavx -O3. radar://13075509 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199015 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Bundle instruction with delay slow and its filler. Now, we can use ↵Venkatraman Govindaraju2014-01-11
| | | | | | -verify-machineinstrs with SPARC backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199014 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix 'ned' typo in doc commentAlp Toker2014-01-11
| | | | | | Patch by Jasper Neumann! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199007 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Add names to passes under the new pass manager, and a debug outputChandler Carruth2014-01-11
| | | | | | | | | | mode that can be used to debug the execution of everything. No support for analyses here, that will come later. This already helps show parts of the opt commandline integration that isn't working. Tests of that will start using it as the bugs are fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199004 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorize.cpp: Appease MSC16.NAKAMURA Takumi2014-01-11
| | | | | | | Excuse me, I hope msc16 builders would be fine till its end day. Introduce nullptr then. ;) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199001 91177308-0d34-0410-b5e6-96231b3b80d8
* [anyregcc] Fix callee-save mask for anyregccJuergen Ributzka2014-01-11
| | | | | | | Use separate callee-save masks for XMM and YMM registers for anyregcc on X86 and select the proper mask depending on the target cpu we compile for. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198985 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r198979 - accidental commit.Eric Christopher2014-01-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198981 91177308-0d34-0410-b5e6-96231b3b80d8
* Reformat.Eric Christopher2014-01-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198980 91177308-0d34-0410-b5e6-96231b3b80d8
* Update function name and add some helpful comments.Eric Christopher2014-01-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198979 91177308-0d34-0410-b5e6-96231b3b80d8
* Extend and simplify the sample profile input file.Diego Novillo2014-01-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1- Use the line_iterator class to read profile files. 2- Allow comments in profile file. Lines starting with '#' are completely ignored while reading the profile. 3- Add parsing support for discriminators and indirect call samples. Our external profiler can emit more profile information that we are currently not handling. This patch does not add new functionality to support this information, but it allows profile files to provide it. I will add actual support later on (for at least one of these features, I need support for DWARF discriminators in Clang). A sample line may contain the following additional information: Discriminator. This is used if the sampled program was compiled with DWARF discriminator support (http://wiki.dwarfstd.org/index.php?title=Path_Discriminators). This is currently only emitted by GCC and we just ignore it. Potential call targets and samples. If present, this line contains a call instruction. This models both direct and indirect calls. Each called target is listed together with the number of samples. For example, 130: 7 foo:3 bar:2 baz:7 The above means that at relative line offset 130 there is a call instruction that calls one of foo(), bar() and baz(). With baz() being the relatively more frequent call target. Differential Revision: http://llvm-reviews.chandlerc.com/D2355 4- Simplify format of profile input file. This implements earlier suggestions to simplify the format of the sample profile file. The symbol table is not necessary and function profiles do not need to know the number of samples in advance. Differential Revision: http://llvm-reviews.chandlerc.com/D2419 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198973 91177308-0d34-0410-b5e6-96231b3b80d8
* Propagation of profile samples through the CFG.Diego Novillo2014-01-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a propagation heuristic to convert instruction samples into branch weights. It implements a similar heuristic to the one implemented by Dehao Chen on GCC. The propagation proceeds in 3 phases: 1- Assignment of block weights. All the basic blocks in the function are initial assigned the same weight as their most frequently executed instruction. 2- Creation of equivalence classes. Since samples may be missing from blocks, we can fill in the gaps by setting the weights of all the blocks in the same equivalence class to the same weight. To compute the concept of equivalence, we use dominance and loop information. Two blocks B1 and B2 are in the same equivalence class if B1 dominates B2, B2 post-dominates B1 and both are in the same loop. 3- Propagation of block weights into edges. This uses a simple propagation heuristic. The following rules are applied to every block B in the CFG: - If B has a single predecessor/successor, then the weight of that edge is the weight of the block. - If all the edges are known except one, and the weight of the block is already known, the weight of the unknown edge will be the weight of the block minus the sum of all the known edges. If the sum of all the known edges is larger than B's weight, we set the unknown edge weight to zero. - If there is a self-referential edge, and the weight of the block is known, the weight for that edge is set to the weight of the block minus the weight of the other incoming edges to that block (if known). Since this propagation is not guaranteed to finalize for every CFG, we only allow it to proceed for a limited number of iterations (controlled by -sample-profile-max-propagate-iterations). It currently uses the same GCC default of 100. Before propagation starts, the pass builds (for each block) a list of unique predecessors and successors. This is necessary to handle identical edges in multiway branches. Since we visit all blocks and all edges of the CFG, it is cleaner to build these lists once at the start of the pass. Finally, the patch fixes the computation of relative line locations. The profiler emits lines relative to the function header. To discover it, we traverse the compilation unit looking for the subprogram corresponding to the function. The line number of that subprogram is the line where the function begins. That becomes line zero for all the relative locations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198972 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the simpler version of sys::fs::remove when possible.Rafael Espindola2014-01-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198958 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove remove_all. A compiler has no need for recursively deleting a directory.Rafael Espindola2014-01-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198955 91177308-0d34-0410-b5e6-96231b3b80d8
* LTO: whitespace changesDuncan P. N. Exon Smith2014-01-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198954 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorizer: Handle strided memory accesses by versioningArnold Schwaighofer2014-01-10
| | | | | | | | | | | | | | | for (i = 0; i < N; ++i) A[i * Stride1] += B[i * Stride2]; We take loops like this and check that the symbolic strides 'Strided1/2' are one and drop to the scalar loop if they are not. This is currently disabled by default and hidden behind the flag 'enable-mem-access-versioning'. radar://13075509 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198950 91177308-0d34-0410-b5e6-96231b3b80d8
* Must not produce Tag_CPU_arch_profile for pre-ARMv7 cores (e.g. cortex-m0)Artyom Skrobov2014-01-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198945 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: fix regression caused by r198914Saleem Abdulrasool2014-01-10
| | | | | | | | The disassembler would no longer be able to disambiguage between the two variants (explicit immediate #0 vs implicit, omitted #0) for the ldrt, strt, ldrbt, strbt mnemonics as both versions indicated the disassembler routine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198944 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence unused variable warning for non-asserting builds that was introduced ↵Kristof Beyls2014-01-10
| | | | | | in r198937. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198941 91177308-0d34-0410-b5e6-96231b3b80d8
* Use 'w' instead of 'c' to represent the win32 mangling.Rafael Espindola2014-01-10
| | | | | | | This change was requested to avoid confusion if we ever support non windows coff systems. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198938 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure -use-init-array has intended effect on all AArch64 ELF targets, ↵Kristof Beyls2014-01-10
| | | | | | not just linux. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198937 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support #:{lower,upper}16: for GNU compatibilitySaleem Abdulrasool2014-01-10
| | | | | | | | The GNU assembler supports prefixing the expression with a '#' to indiciate that the value that is being moved is infact a constant. This improves the compatibility of the integrated assembler's parser for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198916 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support GNU extension for ldrd, strdSaleem Abdulrasool2014-01-10
| | | | | | | | | The GNU assembler has an extension that allows for the elision of the paired register (dt2) for the LDRD and STRD mnemonics. Add support for this in the assembly parser. Canonicalise the usage during the instruction parsing from the specified version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198915 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support implicit immediate 0s for {LD,ST}R{B,}TSaleem Abdulrasool2014-01-10
| | | | | | | | | | | | | | | | The ARM ARM indicates the mnemonics as follows: ldrbt{<c>}{<q>} <Rt>, [<Rn>], {, #+/-<imm>} ldrt{<c>}{<q>} <Rt>, [<Rn>] {, #+/-<imm>} strbt{<c>}{<q>} <Rt>, [<Rn>] {, #<imm>} strt{<c>}{<q>} <Rt>, [<Rn>] {, #+/-<imm>} This improves the parser to deal with the implicit immediate 0 for the mnemonics as per the specification. Thanks to Joerg Sonnenberger for the tests! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198914 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Emit retl/ret instead of jmp instruction. It improves the ↵Venkatraman Govindaraju2014-01-10
| | | | | | readability of the assembly generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198910 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for parsing jmpl instruction and make indirect call and ↵Venkatraman Govindaraju2014-01-10
| | | | | | jmp instructions as aliases to jmpl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198909 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Revert r198851, "Prototype of skeleton type units for fission""David Blaikie2014-01-10
| | | | | | | | | This reverts commit r198865 which reverts r198851. ASan identified a use-of-uninitialized of the DwarfTypeUnit::Ty variable in skeleton type units. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198908 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug with the ARM thumb2 CBNZ and CBNZ instructions thatKevin Enderby2014-01-10
| | | | | | | | | | branch to the next instruction. This can not be encoded but can be turned into a NOP. rdar://15062072 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198904 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Multiclass for loads/stores. No functionality change intended.Venkatraman Govindaraju2014-01-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198893 91177308-0d34-0410-b5e6-96231b3b80d8
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