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* ARM & AArch64: merge NEON absolute compare intrinsicsTim Northover2014-02-04
* AArch64 & ARM: refactor crypto intrinsics to take scalarsTim Northover2014-02-03
* [AArch64] Custom lower concat_vector patterns with v4i16, v4i32, v8i8, v8i16,...Chad Rosier2014-01-30
* [AArch64 NEON] Lower SELECT_CC with vector operand.Kevin Qin2014-01-29
* [AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SH...Kevin Qin2014-01-27
* Revert r199791.Kevin Qin2014-01-27
* Improve pattern match from v1i8 to v1i32 for AArch64 Neon.Jiangning Liu2014-01-26
* Implement pattern match from v1xx to v1xx for AArch64 Neon.Jiangning Liu2014-01-26
* [AArch64 NEON] Add patterns for concat_vector on v2i32.Kevin Qin2014-01-26
* [AArch64 NEON] Add test case for vector FP_ROUND.Kevin Qin2014-01-26
* [AArch64] Removed unused i8 type from FPR8 register class.Ana Pazos2014-01-24
* [AArch64 NEON] Fix a bug in implementing register copy bwtween FPR16.Kevin Qin2014-01-24
* [AArch64] Added vselect patterns with float and double typesAna Pazos2014-01-23
* [AArch64]Add CHECK for two test cases testing scalar_to_vector committed in r...Hao Liu2014-01-23
* [AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SH...Kevin Qin2014-01-22
* [AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.Kevin Qin2014-01-21
* Revert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when generatin...Chandler Carruth2014-01-20
* [AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.Kevin Qin2014-01-20
* [AArch64 NEON] Expand vector for UDIV/SDIV/UREM/SREM/FREM as neon doesn't sup...Kevin Qin2014-01-17
* [AArch64]Fix the problem can't select f16_to_f32 and f32_to_f16.Hao Liu2014-01-17
* [AArch64 NEON] Custom lower conversion between vector integer and vector floa...Kevin Qin2014-01-17
* [AArch64]Fix the problem can't select concat_vectors of two v1i32 types.Hao Liu2014-01-17
* For AArch64, lowering sext_inreg and generate optimized code by using SXTL.Jiangning Liu2014-01-15
* AArch64: don't try to handle [SU]MUL_LOHI nodesTim Northover2014-01-14
* Revert "[AArch64] Added vselect patterns with float and double types"Rafael Espindola2014-01-14
* [AArch64] Added vselect patterns with float and double typesAna Pazos2014-01-14
* [AArch64] Fix assertion failure caused by an invalid comparison between APInt...Andrea Di Biagio2014-01-13
* [AArch64 NEON] Add missing patterns for bitcast from or to v1f64Kevin Qin2014-01-13
* [AArch64 NEON] Add more scenarios to use perm instructions when lowering shuf...Kevin Qin2014-01-13
* Fix non-deterministic SDNodeOrder-dependent codegenNico Rieck2014-01-12
* Make sure -use-init-array has intended effect on all AArch64 ELF targets, not...Kristof Beyls2014-01-10
* Teach the DAGCombiner how to fold 'vselect' dag nodes accordingAndrea Di Biagio2014-01-08
* [AArch64 NEON] Fix generating incorrect value type of NEON_VDUPLANEKevin Qin2014-01-08
* [AArch64]Add support to spill/fill D tuples such as DPair/DTriple/DQuad. Ther...Hao Liu2014-01-07
* [AArch64]Add support to copy D tuples such as DPair/DTriple/DQuad and Q tuple...Hao Liu2014-01-07
* [AArch64 NEON] Fixed incorrect immediate used in BIC instruction.Kevin Qin2014-01-07
* [AArch64 NEON] Fix invalid constant used in vselect condition.Kevin Qin2014-01-06
* For AArch64 Neon, simplify scalar dup by lane0 for fp.Jiangning Liu2013-12-30
* [AArch64]Add code to spill/fill Q register tuples such as QPair/QTriple/QQuad.Hao Liu2013-12-30
* [AArch64]Can't select shift left 0 of type v1i64Hao Liu2013-12-30
* Fix a bug in DAGcombiner about zero-extend after setcc.Kevin Qin2013-12-30
* [AArch64]Fix the problem that can't select mul of v1i64/v2i64 types.Hao Liu2013-12-30
* [AArch64]Fix a problem that the register order of fmls/fmla by element is inc...Hao Liu2013-12-25
* Add missing pattern matches to support ACLE intrinsics of AArch64 NEON.Jiangning Liu2013-12-25
* [AArch64]Add patterns to match normal shift nodes: shl, sra and srl.Hao Liu2013-12-24
* [AArch64 NEON] Fix a bug when lowering BUILD_VECTOR.Kevin Qin2013-12-24
* [AArch64 NEON] Fix a pattern match failure with NEON_VDUP.Kevin Qin2013-12-24
* [AArch64] Check fmul node single use in fused multiply patternsAna Pazos2013-12-24
* [AArch64 NEON] Fixed fused multiply negate add/sub patternsAna Pazos2013-12-24
* [AArch64]The compare to zero intrinsics should be implemented by 'icmp/fcmp' ...Hao Liu2013-12-23
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