| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | IR: add "cmpxchg weak" variant to support permitted failure. | Tim Northover | 2014-06-13 |
| * | ARM big endian function argument passing | Christian Pirker | 2014-05-08 |
| * | ARM: tell LLVM about zext properties of ldrexb/ldrexh | Tim Northover | 2014-04-03 |
| * | ARM: skip cmpxchg failure barrier if ordering is monotonic. | Tim Northover | 2014-04-03 |
| * | ARM: expand atomic ldrex/strex loops in IR | Tim Northover | 2014-04-03 |
| * | IR: add a second ordering operand to cmpxhg for failure | Tim Northover | 2014-03-11 |
| * | [ARM] Use the load-acquire/store-release instructions optimally in AArch32. | Amara Emerson | 2013-09-26 |
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