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path: root/test/CodeGen/ARM/vector-DAGCombine.ll
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* Revert "Tests: Be less dependent on a specific schedule/regalloc"Matthias Braun2013-10-11
* Tests: Be less dependent on a specific schedule/regallocMatthias Braun2013-10-11
* Tests: Use CHECK-LABEL where possibleMatthias Braun2013-10-10
* [SelectionDAG] Teach the vector scalarizer about TRUNCATE.Quentin Colombet2013-09-17
* [DAGCombiner] insert_vector_elt: Avoid building a vector twice.Quentin Colombet2013-07-30
* [ARM][ISel] Improve the lowering of vector loads.Quentin Colombet2013-07-23
* [ARM] Improve the instruction selection of vector loads.Quentin Colombet2013-07-03
* ARM NEON: Handle v16i8 and v8i16 reverse shufflesArnold Schwaighofer2013-02-12
* ARM VLDR/VSTR instructions don't need a size suffix.Jim Grosbach2011-11-14
* Fix a DAG combiner assertion failure when constant folding BUILD_VECTORS.Bob Wilson2011-10-18
* Prevent ARM DAG Combiner from doing an AND or OR combine on an illegal vector...Tanya Lattner2011-04-07
* PR9139: Specify ARM/Darwin triple for vector-DAGCombine.ll test.Bob Wilson2011-02-14
* Add ARM-specific DAG combining to cast i64 vector element load/stores to f64.Bob Wilson2010-12-21
* Fix a DAGCombiner crash when folding binary vector operations with constantBob Wilson2010-12-17
* Combine several vector-related DAGCombiner tests.Bob Wilson2010-12-17