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* On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.John McCall2011-05-29
| | | | | | | | | | | This is important for the correct lowering of unwind instructions (which doesn't matter at all) and llvm.eh.resume calls (which does). Take 2, now with more basic competence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132295 91177308-0d34-0410-b5e6-96231b3b80d8
* I didn't mean to commit these residues of a personal project.John McCall2011-05-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132293 91177308-0d34-0410-b5e6-96231b3b80d8
* On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.John McCall2011-05-29
| | | | | | | | | This is important for the correct lowering of unwind instructions (which doesn't matter at all) and llvm.eh.resume calls (which does). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132291 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairsBruno Cardoso Lopes2011-05-28
| | | | | | | | to load/store i64 values. Since there's no current support to explicitly declare such restrictions, implement it by using specific hardcoded register pairs during isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132248 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement the 'M' output modifier for arm inline asm. This is fairlyEric Christopher2011-05-28
| | | | | | | | | | register allocation dependent and will occasionally break. WIP in the register allocator to model paired/etc registers. rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132242 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the remaining atomic intrinsics to use the right register classes on Thumb2,Cameron Zwarich2011-05-27
| | | | | | and add some basic tests for them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132235 91177308-0d34-0410-b5e6-96231b3b80d8
* Make size computation less brittle.Rafael Espindola2011-05-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132222 91177308-0d34-0410-b5e6-96231b3b80d8
* Make room for register allocation to improve.Jakob Stoklund Olesen2011-05-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132213 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use movw / movt for iOS static codegen for now to workaround some ↵Evan Cheng2011-05-27
| | | | | | tools issues. rdar://9514789 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132211 91177308-0d34-0410-b5e6-96231b3b80d8
* Add iOS testEvan Cheng2011-05-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132203 91177308-0d34-0410-b5e6-96231b3b80d8
* And fix the test in r132194.Eli Friedman2011-05-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132196 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076Eli Friedman2011-05-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132194 91177308-0d34-0410-b5e6-96231b3b80d8
* During branch folding avoid inserting redundant DBG_VALUE machine instructions.Devang Patel2011-05-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132148 91177308-0d34-0410-b5e6-96231b3b80d8
* Rewrite fast-isel integer cast handling to handle more cases, and to be ↵Eli Friedman2011-05-25
| | | | | | | | | | | | simpler and more consistent. The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts). rdar://9437928 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132099 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement the 'm' modifier. Note that it only works for memory operands.Eric Christopher2011-05-25
| | | | | | | Part of rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132081 91177308-0d34-0410-b5e6-96231b3b80d8
* Make tTAILJMPr/tTAILJMPrND emit a tBX without a preceding MOV of PC to LR. ThisCameron Zwarich2011-05-25
| | | | | | fixes <rdar://problem/9495913> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132042 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement the arm 'L' asm modifier.Eric Christopher2011-05-24
| | | | | | | Part of rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132024 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement the immediate part of the 'B' modifier.Eric Christopher2011-05-24
| | | | | | | Part of rdar://9119939 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132023 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for the arm 'y' asm modifier.Eric Christopher2011-05-24
| | | | | | | Fixes part of rdar://9444657 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132011 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix <rdar://problem/9476260> by having tail calls always generate 32-bit ↵Cameron Zwarich2011-05-23
| | | | | | | | branches in Darwin Thumb2 code. Tail calls are already disabled on Thumb1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131894 91177308-0d34-0410-b5e6-96231b3b80d8
* RTABI chapter 4.3.4 specifies __eabi_mem* calls. Specifically, __eabi_memset ↵Renato Golin2011-05-22
| | | | | | accepts parameters (ptr, size, value) in a different order than GNU's memset (ptr, value, size), therefore the special lowering in AAPCS mode. Implementation by Evzen Muller. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131868 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle perfect shuffle case that generates a vrev for vectors of floats.Tanya Lattner2011-05-18
| | | | | | | Add test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131582 91177308-0d34-0410-b5e6-96231b3b80d8
* In r131488 I misunderstood how VREV works. It splits the vector in half and ↵Tanya Lattner2011-05-18
| | | | | | | | | splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32. Updated test case and reverted change to the PerfectShuffle Table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131529 91177308-0d34-0410-b5e6-96231b3b80d8
* vrev is incorrectly defined in the perfect shuffle table. The ordering is ↵Tanya Lattner2011-05-17
| | | | | | backwards (should be 0x3210 versus 0x1032) which exposed a bug when doing a shuffle on a 4xi16. I've attached a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131488 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach LiveInterval::isZeroLength about null SlotIndexes.Jakob Stoklund Olesen2011-05-16
| | | | | | | | | | | | When instructions are deleted, they leave tombstone SlotIndex entries. The isZeroLength method should ignore these null indexes. This causes RABasic to sometimes spill a callee-saved register in the abi-isel.ll test, so don't run that test with -regalloc=basic. Prioritizing register allocation according to spill weight can cause more registers to be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131436 91177308-0d34-0410-b5e6-96231b3b80d8
* Correction. Use explicit target triple in the test.Galina Kistanova2011-05-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131252 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain).Nadav Rotem2011-05-11
| | | | | | | | | | If there is a store after the load node, then there is a chain, which means that there is another user. Thus, asking hasOneUser would fail. Instead we ask hasNUsesOfValue on the 'data' value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131183 91177308-0d34-0410-b5e6-96231b3b80d8
* Produce a __debug_frame section on darwin ARM when appropriate.Rafael Espindola2011-05-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131151 91177308-0d34-0410-b5e6-96231b3b80d8
* Give this test an explicit register allocator, so that it can work even ifDan Gohman2011-05-04
| | | | | | | the default register allocator is changed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130883 91177308-0d34-0410-b5e6-96231b3b80d8
* SjLj EH could produce a machine basic block that legitimately has more than oneBill Wendling2011-05-04
| | | | | | | | | | | | | | landing pad as its successor. SjLj exception handling jumps to the correct landing pad via a switch statement that's generated right before code-gen. Loosen the constraint in the machine instruction verifier to allow for this. Note, this isn't the most rigorous check since we cannot determine where that switch statement came from. But it's marginally better than turning this check off when SjLj exceptions are used. <rdar://problem/9187612> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130881 91177308-0d34-0410-b5e6-96231b3b80d8
* This test fails on ARM. The test shouldn't explicitly specify alignment (and ↵Galina Kistanova2011-05-04
| | | | | | alignment 4 is wrong) and requires hard-float. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130875 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not emit location expression size twice.Devang Patel2011-05-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130854 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bunch of ARM tests to be register allocation independent.Jakob Stoklund Olesen2011-05-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130800 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the test less likely to fail with minor changes.Evan Cheng2011-05-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130778 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove test for iOS divmod function, since that is disabled for now.Bob Wilson2011-05-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130769 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a few ARM coprocessor intrinsics. Testcases includedBruno Cardoso Lopes2011-05-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130763 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an unfolded offset field to LSR's Formula record. This is used toDan Gohman2011-05-03
| | | | | | | | | model constants which can be added to base registers via add-immediate instructions which don't require an additional register to materialize the immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130743 91177308-0d34-0410-b5e6-96231b3b80d8
* Weekly fix of register allocation dependent unit tests.Jakob Stoklund Olesen2011-04-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130567 91177308-0d34-0410-b5e6-96231b3b80d8
* Make FastEmit_ri_ try a bit harder to succeed for supported operations; ↵Eli Friedman2011-04-29
| | | | | | FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130560 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch to ImmLeaf (which can be used by FastISel) for a few more common ↵Eli Friedman2011-04-29
| | | | | | ARM/Thumb2 patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130552 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix run-line, again. :(Eli Friedman2011-04-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130540 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-committing r130454, which does not in fact break anything.Eli Friedman2011-04-29
| | | | | | | | | Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. rdar://problem/9338332 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130539 91177308-0d34-0410-b5e6-96231b3b80d8
* Add trunc->branch support, this won't help with clang's i8->i1 truncationsEric Christopher2011-04-29
| | | | | | | for bools, but is a start. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130534 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r130454; apparently this doesn't actually work.Eli Friedman2011-04-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130462 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix runline.Eli Friedman2011-04-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130455 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a rather obscure crash caused by ARM fast-isel generating code which ↵Eli Friedman2011-04-28
| | | | | | | | | | redefines a register. rdar://problem/9338332 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130454 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach dwarf writer to handle complex address expression for .debug_loc entries.Devang Patel2011-04-28
| | | | | | | | This fixes clang generated blocks' variables' debug info. Radar 9279956. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130373 91177308-0d34-0410-b5e6-96231b3b80d8
* If converter was being too cute. It look for root BBs (which don't haveEvan Cheng2011-04-27
| | | | | | | | | | | successors) and use inverse depth first search to traverse the BBs. However that doesn't work when the CFG has infinite loops. Simply do a linear traversal of all BBs work just fine. rdar://9344645 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130324 91177308-0d34-0410-b5e6-96231b3b80d8
* Also add <imp-def> operands for defined and dead super-registers when rewriting.Jakob Stoklund Olesen2011-04-27
| | | | | | | We cannot rely on the <imp-def> operands added by LiveIntervals in all cases as demonstrated by the test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130313 91177308-0d34-0410-b5e6-96231b3b80d8
* Be careful about scheduling nodes above previous calls. It increase usages ofEvan Cheng2011-04-26
| | | | | | | | | | | | | more callee-saved registers and introduce copies. Only allows it if scheduling a node above calls would end up lessen register pressure. Call operands also has added ABI restrictions for register allocation, so be extra careful with hoisting them above calls. rdar://9329627 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130245 91177308-0d34-0410-b5e6-96231b3b80d8
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