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Mips
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i64arg.ll
Commit message (
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Author
Age
*
[mips] Make sure there is a chain edge dependency between loads that read
Akira Hatanaka
2013-11-09
*
[mips] Make sure loads from lazy-binding entries do not get CSE'd or hoisted out
Akira Hatanaka
2013-09-28
*
[mips] Implement MipsTargetMachine::getInstrItineraryData().
Akira Hatanaka
2013-07-12
*
[mips] Print move instructions.
Akira Hatanaka
2013-03-04
*
[mips] Implement MipsRegisterInfo::getRegPressureLimit.
Akira Hatanaka
2013-01-22
*
[mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy
Akira Hatanaka
2012-12-20
*
Eliminate the stack slot used to save the global base register.
Akira Hatanaka
2012-07-25
*
Fix test cases.
Akira Hatanaka
2012-06-14
*
Change the default scheduler from Latency to ILP, since Latency
Dan Gohman
2011-10-24
*
Fix test cases.
Akira Hatanaka
2011-09-09
*
Change the chain input of nodes that load the address of a function. This change
Akira Hatanaka
2011-06-24
*
Make $fp and $ra callee-saved registers and let PrologEpilogInserter handle
Akira Hatanaka
2011-05-20
*
Fix bug in which nodes that write to argument registers do not get glued with...
Akira Hatanaka
2011-05-20
*
Align i64 arguments to 64 bit boundaries.
Akira Hatanaka
2011-05-19