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CodeGen
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R600
Commit message (
Expand
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Author
Age
*
R600: Workaround for cayman loop bug
Vincent Lejeune
2013-12-02
*
R600: Expand vector FABS
Tom Stellard
2013-11-27
*
R600/SI: Implement spilling of SGPRs v5
Tom Stellard
2013-11-27
*
R600/SI: Use SGPR_32 register class for 32-bit SMRD outputs
Tom Stellard
2013-11-27
*
R600: Add support for ISD::FROUND
Tom Stellard
2013-11-27
*
R600/SI: Fixing handling of condition codes
Tom Stellard
2013-11-22
*
SelectionDAG: Optimize expansion of vec_type = BITCAST scalar_type
Tom Stellard
2013-11-22
*
R600/SI: Fix moveToVALU when the first operand is VSrc.
Matt Arsenault
2013-11-18
*
R600/SI: Fix multiple SGPR reads when using VCC.
Matt Arsenault
2013-11-18
*
R600/SI: Implement add i64, but do not yet enable.
Matt Arsenault
2013-11-18
*
R600/SI: Move patterns to match add / sub to scalar instructions
Matt Arsenault
2013-11-18
*
R600: Enable the IR structurizer by default
Tom Stellard
2013-11-18
*
R600: Fix a crash in the AMDILCFGStrucurizer
Tom Stellard
2013-11-18
*
R600/SI: Fix illegal VGPR->SGPR copy inside of loop
Tom Stellard
2013-11-18
*
R600/SI: Fix another case of illegal VGPR->SGPR copy
Tom Stellard
2013-11-18
*
Use right address space pointer size
Matt Arsenault
2013-11-17
*
Fix assert on unaligned access to global with different address space size.
Matt Arsenault
2013-11-16
*
Fix codegen for null different sized pointer.
Matt Arsenault
2013-11-16
*
R600: Make dot_4 instructions predicable
Vincent Lejeune
2013-11-16
*
R600/SI: Add VReg_96 register class to SIRegisterInfo::hasVGPRs()
Tom Stellard
2013-11-15
*
Add target hook to prevent folding some bitcasted loads.
Matt Arsenault
2013-11-15
*
R600: Fix scheduling of instructions that use the LDS output queue
Tom Stellard
2013-11-15
*
R600/SI: Add testcase for problem I ran into
Matt Arsenault
2013-11-14
*
R600/SI: Add support for private address space load/store
Tom Stellard
2013-11-13
*
R600/SI: Prefer SALU instructions for bit shift operations
Tom Stellard
2013-11-13
*
R600: Fix selection failure on EXTLOAD
Matt Arsenault
2013-11-13
*
R600/SI: Change formatting of printed registers.
Matt Arsenault
2013-11-12
*
R600/SI: Add test that fails due to requiring i64 mul for pointers
Matt Arsenault
2013-11-11
*
R600: Use function inputs to represent data stored in gpr
Vincent Lejeune
2013-11-11
*
R600: Fix LowerUDIVREM
Vincent Lejeune
2013-11-06
*
Fix CodeGen for unaligned loads with address spaces
Matt Arsenault
2013-10-30
*
R600: Custom lower f32 = uint_to_fp i64
Tom Stellard
2013-10-30
*
R600/SI: Add compute support for CI v2
Tom Stellard
2013-10-29
*
R600: Expand vector FSQRT ops
Tom Stellard
2013-10-29
*
R600/SI: fix MIMG writemask adjustement
Tom Stellard
2013-10-23
*
R600: Fix handling of vector kernel arguments
Tom Stellard
2013-10-23
*
R600/SI: Add support for i64 bitwise or
Tom Stellard
2013-10-23
*
R600/SI: Use S_LOAD_DWORD instructions for v8i32 and v16i32
Tom Stellard
2013-10-23
*
R600: Simplify handling of private address space
Tom Stellard
2013-10-22
*
Fix CodeGen for vectors of pointers with address spaces.
Matt Arsenault
2013-10-21
*
Fix CodeGen for different size address space GEPs
Matt Arsenault
2013-10-21
*
R600: Fix a crash in the AMDILCFGStructurizer
Tom Stellard
2013-10-16
*
R600: improve dump of S_WAITCNT
Vincent Lejeune
2013-10-13
*
R600: Use masked read sel for texture instructions
Vincent Lejeune
2013-10-13
*
R600: fix swizzle export
Vincent Lejeune
2013-10-13
*
R600: Add scalar i32 add test
Matt Arsenault
2013-10-11
*
Use CHECK-LABEL
Matt Arsenault
2013-10-11
*
R600: Fix trunc i64 to i32 on SI
Matt Arsenault
2013-10-10
*
R600/SI: Use -verify-machineinstrs for most tests
Tom Stellard
2013-10-10
*
Add some xfaild R600 tests.
Matt Arsenault
2013-10-08
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