| Commit message (Expand) | Author | Age |
|---|
| ... | |
| * | Move x86 specific tests into test/CodeGen/X86. | Devang Patel | 2010-08-05 |
| * | Move x86-specific tests out of test/Transforms/LoopStrengthReduce and | Dan Gohman | 2010-08-05 |
| * | tests: CodeGen/X86/GC tests require X86. | Daniel Dunbar | 2010-08-05 |
| * | The lower invoke pass needs to have unreachable code elimination run after it | Bill Wendling | 2010-08-04 |
| * | PR7814: Truncates cannot be ignored for signed comparisons. | Eli Friedman | 2010-08-04 |
| * | Testcase for r110248. | Bill Wendling | 2010-08-04 |
| * | call-imm.ll test case regex fix. Patch by Dimitry Andric! | Stuart Hastings | 2010-08-04 |
| * | Make SPU backend handle insertelement and | Kalle Raiskila | 2010-08-04 |
| * | Combine NEON VABD (absolute difference) intrinsics with ADDs to make VABA | Bob Wilson | 2010-08-04 |
| * | OK, that's it. This test is going away now. But don't worry, I am taking it to a | Jakob Stoklund Olesen | 2010-08-03 |
| * | More SPU v2f32 stuff added: insertelement and shuffle. | Kalle Raiskila | 2010-08-02 |
| * | Add preliminary v2f32 support for SPU. Like with v2i32, we just | Kalle Raiskila | 2010-08-02 |
| * | Add preliminary v2i32 support for SPU backend. As there are no | Kalle Raiskila | 2010-08-02 |
| * | PR7781: Fix incorrect shifting in PPCTargetLowering::LowerBUILD_VECTOR. | Eli Friedman | 2010-08-02 |
| * | PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actually | Eli Friedman | 2010-08-01 |
| * | Revert new AVX intrinsic tests. They are breaking buildbots and Bruno is | Bob Wilson | 2010-07-31 |
| * | A *bunch* of tests for AVX intrinsics | Bruno Cardoso Lopes | 2010-07-30 |
| * | Fix for bug reported by Evzen Muller on llvm-commits: make sure to correctly | Eli Friedman | 2010-07-30 |
| * | Many Thumb2 instructions can reference the full ARM register set (i.e., | Jim Grosbach | 2010-07-30 |
| * | Implement vector constants which are splat of | Dale Johannesen | 2010-07-29 |
| * | Implement a vectorized algorithm for <16 x i8> << <16 x i8> | Nate Begeman | 2010-07-28 |
| * | ~40% faster vector shl <4 x i32> on SSE 4.1 Larger improvements for smaller ... | Nate Begeman | 2010-07-27 |
| * | Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECT... | Nate Begeman | 2010-07-27 |
| * | Currently EH lowering code expects typeinfo to be global only. | Anton Korobeynikov | 2010-07-26 |
| * | - Allow target to specify when is register pressure "too high". In most cases, | Evan Cheng | 2010-07-23 |
| * | Use the proper type for shift counts. This fixes a bootstrap error. | Dan Gohman | 2010-07-23 |
| * | DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits | Dan Gohman | 2010-07-23 |
| * | Custom lower the memory barrier instructions and add support | Eric Christopher | 2010-07-22 |
| * | More register pressure aware scheduling work. | Evan Cheng | 2010-07-21 |
| * | Baby steps towards ARM fast-isel. | Eric Christopher | 2010-07-21 |
| * | Fix calling convention on ARM if vfp2+ is enabled. | Rafael Espindola | 2010-07-21 |
| * | Fix SCEV denormalization of expressions where the exit value from | Dan Gohman | 2010-07-20 |
| * | update tests for smarter BIC usage | Jim Grosbach | 2010-07-20 |
| * | The same problem was being tracked in PR7652. | Duncan Sands | 2010-07-20 |
| * | Fix PR7174, a couple o Mips fixes: | Bruno Cardoso Lopes | 2010-07-20 |
| * | Fix Mips PR7473. Patch by stetorvs@gmail.com | Bruno Cardoso Lopes | 2010-07-20 |
| * | After a custom inserter, in a block which has constant instructions, | Dan Gohman | 2010-07-19 |
| * | Remove r108639 now that it is handled by InstCombine instead. | Owen Anderson | 2010-07-19 |
| * | Add a testcase for r108639. | Owen Anderson | 2010-07-18 |
| * | Add combiner patterns to more effectively utilize the BFI (bitfield insert) | Jim Grosbach | 2010-07-17 |
| * | Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instruction | Jim Grosbach | 2010-07-16 |
| * | Consider this function: | Bill Wendling | 2010-07-16 |
| * | Remove the X86::FP_REG_KILL pseudo-instruction and the X86FloatingPointRegKill | Jakob Stoklund Olesen | 2010-07-16 |
| * | Feed the right output into FileCheck. | Benjamin Kramer | 2010-07-16 |
| * | Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway. | Jakob Stoklund Olesen | 2010-07-16 |
| * | Add forgotten test case. | Jakob Stoklund Olesen | 2010-07-16 |
| * | Use the source-order scheduler instead of the "fast" scheduler at -O0, | Dan Gohman | 2010-07-16 |
| * | The SelectionDAGBuilder's handling of debug info, on rare | Dale Johannesen | 2010-07-16 |
| * | Revert. This isn't the correct way to go. | Bill Wendling | 2010-07-15 |
| * | Handle code gen for the unreachable instruction if it's the only instruction in | Bill Wendling | 2010-07-15 |
