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* Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoidBob Wilson2010-08-17
* Add a Thumb2 t2RSBrr instruction for disassembly only.Bob Wilson2010-08-13
* Move the Thumb2 SSAT and USAT optional shift operator out of theBob Wilson2010-08-13
* Cleaned up the for-disassembly-only entries in the arm instruction table so thatJohnny Chen2010-08-12
* The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .tdJohnny Chen2010-08-12
* Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm.Johnny Chen2010-08-11
* Move the ARM SSAT and USAT optional shift amount operand out of theBob Wilson2010-08-11
* Add an ARM RSCrr instruction for disassembly only.Bob Wilson2010-08-05
* Add an ARM RSBrr instruction for disassembly only.Bob Wilson2010-08-05
* ARM "rrx" shift operands do not have an immediate. PR7790.Bob Wilson2010-08-05
* Add support for disassembling VMVN (immediate) instructions. PR7747.Bob Wilson2010-07-31
* my work on adding segment registers to LEA missed the Chris Lattner2010-07-13
* Eliminated the classification of control registers into %ecr_Sean Callanan2010-05-06
* Thumb instructions which have reglist operands at the end and predicate operandsJohnny Chen2010-04-21
* When doing Thumb disassembly, there's no need to consider t2ADDrSPi12/t2SUBrS...Johnny Chen2010-04-20
* For t2LDRT, t2LDRBT, t2LDRHT, t2LDRSBT, and t2LDRSHT, if Rn(Inst{19-16})=='11...Johnny Chen2010-04-20
* According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1Johnny Chen2010-04-19
* ARM disassembler did not react to recent changes to the NEON instruction table.Johnny Chen2010-04-19
* testcase for r101538, patch by Nico Schmidt!Chris Lattner2010-04-17
* Minor change to make the test case comply with Vd<0> == '0' when Q == '1'.Johnny Chen2010-04-16
* Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for aJohnny Chen2010-04-16
* In the same spirit of r101524, which removed the assert() from printAddrMode2...Johnny Chen2010-04-16
* Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. ChangedJohnny Chen2010-04-16
* Added another test case for am3offset operand, testing Rn, #+/-imm8.Johnny Chen2010-04-15
* Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, notJohnny Chen2010-04-15
* tests: MC/Disassembler tests depend on ARM support being compiler in.Daniel Dunbar2010-04-15
* Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after callingJohnny Chen2010-04-12
* unXFAIL, arm disassembler was reenabled.Benjamin Kramer2010-04-07
* Reverting 100265 to try to get buildbots green again. Lots of self-hosting bu...Evan Cheng2010-04-05
* Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgenJohnny Chen2010-04-02
* Fix the vmxon entry in the X86InstrInfo.td so it has the correct prefix bytesKevin Enderby2010-03-08
* add encoder support and tests for rdtscpChris Lattner2010-02-13
* remove special cases for vmlaunch, vmresume, vmxoff, and swapgsChris Lattner2010-02-13
* add some disassemble testcases for weird instructionsChris Lattner2010-02-12
* specify a triple to use, fixing the test on non-x86-64 hosts.Chris Lattner2009-12-22
* various cleanups, make the disassemble reject lines with too muchChris Lattner2009-12-22
* rewrite the file parser for the disassembler, implementing support forChris Lattner2009-12-22