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* This patch implements jalx instruction for Mips architecture.This instruction...Vladimir Medic2014-03-03
* [Sparc] Add return/rett instruction to Sparc backend.Venkatraman Govindaraju2014-03-02
* [Sparc] Add support for decoding jmpl/retl/ret instruction.Venkatraman Govindaraju2014-03-02
* [Sparc] Add support for parsing fcmp with %fcc registers.Venkatraman Govindaraju2014-03-02
* [Sparc] Add support to decode unimp instruction.Venkatraman Govindaraju2014-03-01
* [Sparc] Add support to decode negative simm13 operands in the sparc disassemb...Venkatraman Govindaraju2014-03-01
* [Sparc] Add support for decoding call instructions in the sparc disassembler.Venkatraman Govindaraju2014-03-01
* [Sparc] Add support to disassemble sparc memory instructions.Venkatraman Govindaraju2014-03-01
* [Sparc] Emit 'restore' instead of 'restore %g0, %g0, %g0'. This improves the ...Venkatraman Govindaraju2014-03-01
* Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0x...Craig Topper2014-02-19
* Fix diassembler handling of rex.b when mod=00/01/10 and bbb=101. Mod=00 shoul...Craig Topper2014-02-17
* Add opcode extension forms of MOV8ri/MOV16ri/MOV32ri.Craig Topper2014-02-15
* [Sparc] Correct quad register list in the asm parser.Venkatraman Govindaraju2014-01-24
* [x86] Fix disassembly of MOV16ao16 et al.David Woodhouse2014-01-20
* [x86] Fix 16-bit disassembly of JCXZ/JECXZDavid Woodhouse2014-01-20
* [x86] Rename MOVSD/STOSD/LODSD/OUTSD to MOVSL/STOSL/LODSL/OUTSLDavid Woodhouse2014-01-20
* [x86] Fix disassembly of callw instructionDavid Woodhouse2014-01-20
* [x86] Fix 16-bit handling of OpSize bitDavid Woodhouse2014-01-20
* Allow x86 mov instructions to/from memory with absolute address to be encoded...Craig Topper2014-01-16
* LL and SC decoder method fix.Zoran Jovanovic2014-01-15
* Added support for LWU microMIPS instruction.Zoran Jovanovic2014-01-15
* [Sparc] Add support for parsing floating point instructions.Venkatraman Govindaraju2014-01-12
* ARM: change implicit immediate forms of {ld,st}r{,b}t to psuedo-instructionsSaleem Abdulrasool2014-01-12
* ARM: fix regression caused by r198914Saleem Abdulrasool2014-01-10
* [Sparc] Add support for parsing branch instructions and conditional moves.Venkatraman Govindaraju2014-01-08
* [Sparc] Add initial implementation of disassembler for sparcVenkatraman Govindaraju2014-01-06
* Remove need for MODIFIER_OPCODE in the disassembler tables. AddRegFrms are re...Craig Topper2014-01-01
* Add two fp test cases I missed in my previous commit.Craig Topper2013-12-31
* Add more X86 FP stack disassembler test cases.Craig Topper2013-12-31
* Revert r198238 and add FP disassembler tests. It didn't work and I didn't rea...Craig Topper2013-12-31
* AVX-512: decoder for AVX-512, made by Alexey Bader.Elena Demikhovsky2013-12-25
* [SystemZ] Add MC support for interlocked-access 1 instructionsRichard Sandiford2013-12-24
* Add a disassembler to the PowerPC backendHal Finkel2013-12-19
* [AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction.Kevin Qin2013-11-29
* AArch64: Fix a bug about disassembling post-index load single element to 4 ve...Hao Liu2013-11-28
* [AArch64] Add support for NEON scalar floating-point absolute difference.Chad Rosier2013-11-27
* [AArch64] Add support for NEON scalar floating-point to integer convertChad Rosier2013-11-26
* Fixed a bug about disassembling AArch64 post-index load/store single element ...Hao Liu2013-11-25
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-19
* Implement AArch64 NEON instruction set AdvSIMD (table).Jiangning Liu2013-11-14
* [SystemZ] Add the general form of BCRRichard Sandiford2013-11-13
* Support for microMIPS trap instruction with immediate operands.Zoran Jovanovic2013-11-13
* [AArch64] Implemented AdvSIMD scalar x indexed element format and AdvSIMD scalarChad Rosier2013-11-12
* [ARM] Add support for MVFR2 which is new in ARMv8Artyom Skrobov2013-11-11
* [AArch64] Add support for NEON scalar floating-point convert to fixed-point i...Chad Rosier2013-11-11
* [ARM] Handling for coprocessor instructions that are undefined starting from ...Artyom Skrobov2013-11-08
* [ARM] Handling for coprocessor instructions that are undefined starting from ...Artyom Skrobov2013-11-08
* [ARM] Handling for coprocessor instructions that are undefined starting from ...Artyom Skrobov2013-11-08
* Support for microMIPS trap instructions 1.Zoran Jovanovic2013-11-07
* Implement AArch64 Neon instruction set Perm.Jiangning Liu2013-11-06
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