| Commit message (Expand) | Author | Age |
|---|
| * | [x86] Do not relax PUSHi16 to PUSHi32 (PR18414) | David Woodhouse | 2014-01-08 |
| * | [x86] Make AsmParser validate registers for memory operands a bit better | David Woodhouse | 2014-01-08 |
| * | [x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand | David Woodhouse | 2014-01-08 |
| * | [x86] Use 16-bit addressing where possible in 16-bit mode | David Woodhouse | 2014-01-08 |
| * | [x86] Fix JCXZ,JECXZ_32 for 16-bit mode | David Woodhouse | 2014-01-08 |
| * | [x86] Disambiguate RET[QL] and fix aliases for 16-bit mode | David Woodhouse | 2014-01-08 |
| * | [x86] Disambiguate [LS][IG]DT{32,64}m and add 16-bit versions, fix aliases | David Woodhouse | 2014-01-08 |
| * | [x86] Add JMP16[rm],CALL16[rm] instructions, and fix up aliases | David Woodhouse | 2014-01-08 |
| * | [x86] Add PUSHA16,POPA16 instructions, and fix aliases for 16-bit mode | David Woodhouse | 2014-01-08 |
| * | [x86] Add OpSize16 to instructions that need it | David Woodhouse | 2014-01-08 |
| * | Add OpSize16 bit, for instructions which need 0x66 prefix in 16-bit mode | Craig Topper | 2014-01-06 |
| * | [x86] Add basic support for .code16 | Craig Topper | 2014-01-06 |
| * | Fix ModR/M byte output for 16-bit addressing modes (PR18220) | Craig Topper | 2014-01-05 |
| * | Un-revert: the buildbot failure in LLVM on lld-x86_64-win7 had me with | Kevin Enderby | 2013-12-19 |
| * | Revert my change to the X86 assembler for intel syntax to work with | Kevin Enderby | 2013-12-19 |
| * | Changed the X86 assembler for intel syntax to work with directional labels. | Kevin Enderby | 2013-12-19 |
| * | Grow the stackmap/patchpoint format to hold 64-bit IDs. | Andrew Trick | 2013-12-13 |
| * | [Stackmap] Specify the triple and cpu to fix the unit test. | Juergen Ributzka | 2013-12-04 |
| * | [Stackmap] Emit multi-byte nops for X86. | Juergen Ributzka | 2013-12-04 |
| * | Use -triple to fix the test on non-ELF hosts. | Rafael Espindola | 2013-11-25 |
| * | Don't use nopl in cpus that don't support it. | Rafael Espindola | 2013-11-25 |
| * | X86: Assembly files with .cfi_cfa_def shouldn't hit llvm_unreachable() | Jim Grosbach | 2013-11-08 |
| * | Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instru... | Craig Topper | 2013-10-14 |
| * | Mark MOVMSKPS/MOVMSKPD/VPINSRWrr64i as AsmParserOnly to remove them from the ... | Craig Topper | 2013-10-14 |
| * | Allow non-AVX form of pmovmskb to take a GR64 operand. | Craig Topper | 2013-10-10 |
| * | Remove some instructions that existed to provide aliases to the assembler. Ca... | Craig Topper | 2013-10-08 |
| * | Teach X86 asm parser that VMOVAPSrr and other VEX-encoded register to registe... | Craig Topper | 2013-10-07 |
| * | Add XOP disassembler support. Fixes PR13933. | Craig Topper | 2013-10-03 |
| * | Revert accidental commit. | Craig Topper | 2013-09-29 |
| * | Change type of XOP flag in code emitters to a bool. Remove a some unneeded ca... | Craig Topper | 2013-09-29 |
| * | Adding intrinsics to the llvm backend for TBM instruction set. | Yunzhong Gao | 2013-09-27 |
| * | Fixing Intel format of the vshufpd instruction. | Yunzhong Gao | 2013-09-27 |
| * | Add the remaining Intel SHA instructions | Ben Langmuir | 2013-09-14 |
| * | Partial support for Intel SHA Extensions (sha1rnds4) | Ben Langmuir | 2013-09-12 |
| * | AVX-512: implemented extractelement with variable index. | Elena Demikhovsky | 2013-09-12 |
| * | [ms-inline asm] Support offsets after segment registers | David Majnemer | 2013-08-27 |
| * | AVX-512: Added SHIFT instructions. | Elena Demikhovsky | 2013-08-21 |
| * | [tests] Cleanup initialization of test suffixes. | Daniel Dunbar | 2013-08-16 |
| * | EVEX and compressed displacement encoding for AVX512 | Elena Demikhovsky | 2013-08-01 |
| * | Add test cases for the various instruction alias and Intel syntax fixes that ... | Craig Topper | 2013-07-26 |
| * | Don't let x86 asm printer use the no operand movsd alias. It should use the n... | Craig Topper | 2013-07-23 |
| * | Fix the move to/from accumulator register instructions that use a full 64-bit | Kevin Enderby | 2013-07-22 |
| * | Recommit r186813: More Intel syntax alias fixes. With the addition of suppres... | Craig Topper | 2013-07-22 |
| * | Prefix failing commands with not to make clear they are expected to fail. | Rafael Espindola | 2013-07-03 |
| * | Add support for encoding the HLE XACQUIRE and XRELEASE prefixes. | Stefanus Du Toit | 2013-06-18 |
| * | X86: Make the cmov aliases work with intel syntax too. | Benjamin Kramer | 2013-06-13 |
| * | [ms-inline asm] Fix a crasher when we fail on a direct match. | Chad Rosier | 2013-05-10 |
| * | [x86AsmParser] It's valid to stop parsing an operand at an immediate. | Chad Rosier | 2013-05-09 |
| * | Add test case for PR15779, which has previously been fixed. | Chad Rosier | 2013-04-22 |
| * | [ms-inline asm] Apply the condition code mnemonic aliases to both the Intel and | Chad Rosier | 2013-04-18 |
