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* MC: Fix .octa output for APInts with BitWidth > 128David Woodhouse2014-02-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200615 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Add support for .octaDavid Woodhouse2014-02-01
| | | | | | | | | | This is a minimal implementation which accepts only constants rather than full expressions, but that should be perfectly sufficient for all known users for now. Patch from PaX Team <pageexec@freemail.hu> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200614 91177308-0d34-0410-b5e6-96231b3b80d8
* Update a .fill test to use the updated semantics.David Majnemer2014-02-01
| | | | | | | Something funny happened, this should've been part of r200606. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200607 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Improve the .fill directive's compatibility with GASDavid Majnemer2014-02-01
| | | | | | | | | | Per the GAS documentation, .fill should permit pattern widths that aren't a power of two. While I was in the neighborhood, I added some sanity checking. This change was motivated by a use of this construct in the Linux Kernel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200606 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove another hasRawTextSupport.Rafael Espindola2014-01-31
| | | | | | | | | To remove this one simply move the end of file logic from the asm printer to the target mc streamer. This removes the last call to hasRawTextSupport from lib/Target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200590 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Add insert.d instruction.Matheus Almeida2014-01-31
| | | | | | | This instruction is only available on Mips64 cores that implement the MSA ASE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200543 91177308-0d34-0410-b5e6-96231b3b80d8
* Move address override handling in X86MCCodeEmitter to a place where it works ↵Craig Topper2014-01-31
| | | | | | for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200516 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Fix signed relocations for i64i32imm operandsDavid Woodhouse2014-01-30
| | | | | | | | | These should end up (in ELF) as R_X86_64_32S relocs, not R_X86_64_32. Kill the horrid and incomplete special case and FIXME in EncodeInstruction() and set things up so it can infer the signedness from the ImmType just like it can the size and whether it's PC-relative. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200495 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR18381 - print a minimal diagnostic rather than assert on unresolved ↵Timur Iskhodzhanov2014-01-30
| | | | | | .secidx target git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200490 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .object_archSaleem Abdulrasool2014-01-30
| | | | | | | | | | The .object_arch directive indicates an alternative architecture to be specified in the object file. The directive does *not* effect the enabled feature bits for the object file generation. This is particularly useful when the code performs runtime detection and would like to indicate a lower architecture as the requirements than the actual instructions used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200451 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .movspSaleem Abdulrasool2014-01-30
| | | | | | | | .movsp is an ARM unwinding directive that indicates to the unwinder that a register contains an offset from the current stack pointer. If the offset is unspecified, it defaults to zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200449 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: suuport .tlsdescseq directiveSaleem Abdulrasool2014-01-30
| | | | | | | | | | | This enhances the ARMAsmParser to handle .tlsdescseq directives. This is a slightly special relocation. We must be able to generate them, but not consume them in assembly. The relocation is meant to assist the linker in generating a TLS descriptor sequence. The ELF target streamer is enhanced to append additional fixups into the current segment and that is used to emit the new R_ARM_TLS_DESCSEQ relocations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200448 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: support TLS descriptor relocationsSaleem Abdulrasool2014-01-30
| | | | | | | | Add support for tlsdesc relocations which are part of the ABI, marked as experimental. These relocations permit the linker to perform TLS reference optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200447 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: support tlscall relocationsSaleem Abdulrasool2014-01-30
| | | | | | | | | | | | | | This adds support for TLS CALL relocations. TLS CALL relocations are used to indicate to the linker to generate appropriate entries to resolve TLS references via an appropriate function invocation (e.g. __tls_get_addr(PLT)). In order to accomodate the linker relaxation of the TLS access model for the references (GD/LD -> IE, IE -> LE), the relocation addend must be incomplete. This requires that the partial inplace value is also incomplete (i.e. 0). We simply avoid the offset value calculation at the time of the fixup adjustment in the ARM assembler backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200446 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Better management of macro argumentsDavid Majnemer2014-01-29
| | | | | | | | | | | | | The linux kernel makes uses of a GAS `feature' which substitutes nothing for macro arguments which aren't specified. Proper support for these kind of macro arguments necessitated a cleanup of differences between `GAS' and `Darwin' dialect macro processing. Differential Revision: http://llvm-reviews.chandlerc.com/D2634 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200409 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Add fill.d instruction.Matheus Almeida2014-01-29
| | | | | | | | | This instruction is only available on Mips64 cores that implement the MSA ASE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200400 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Add copy_{u,s}.d.Matheus Almeida2014-01-29
| | | | | | | | | These instructions are only available on Mips64 cores that implement the MSA ASE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200398 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable EHABI by defaultRenato Golin2014-01-29
| | | | | | | | | | | | | | | | | | | | | | After all hard work to implement the EHABI and with the test-suite passing, it's time to turn it on by default and allow users to disable it as a work-around while we fix the eventual bugs that show up. This commit also remove the -arm-enable-ehabi-descriptors, since we want the tables to be printed every time the EHABI is turned on for non-Darwin ARM targets. Although MCJIT EHABI is not working yet (needs linking with the right libraries), this commit also fixes some relocations on MCJIT regarding the EH tables/lib calls, and update some tests to avoid using EH tables when none are needed. The EH tests in the test-suite that were previously disabled on ARM now pass with these changes, so a follow-up commit on the test-suite will re-enable them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200388 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Reorganize macro MC test along dialect linesDavid Majnemer2014-01-29
| | | | | | | | | | | | This commit seeks to do two things: - Run the surfeit of tests under the Darwin dialect. This ends up affecting tests which assumed that spaces could deliminate arguments. - The GAS dialect tests should limit their surface area to things that could plausibly work under GAS. For example, Darwin style arguments have no business being in such a test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200383 91177308-0d34-0410-b5e6-96231b3b80d8
* Tests for mode switchingDavid Woodhouse2014-01-28
| | | | | | | 1. test that inlineasm works 2. test that relaxable instructions are re-encoded in the correct mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200351 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix ELF header flags.Matheus Almeida2014-01-28
| | | | | | | | | As opposed to GCC/GAS the default ABI for Mips64 is n64. Compatibility bit should be set if o32 ABI is used when targeting Mips64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200332 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM MC: Fix the initial DWARF CFI unwind info at the start of a functionMark Seaborn2014-01-27
| | | | | | | | | | | | | | | | | | | | This brings MC into line with GNU 'as' on ARM, and it brings the ARM target into line with most other LLVM targets, which declare the initial CFI state with addInitialFrameState(). Without this, functions generated with .cfi_startproc/endproc on ARM will tend to cause GDB to abort with: gdb/dwarf2-frame.c:1132: internal-error: Unknown CFA rule. I've also tested this by comparing the output of "readelf -w" on the object files produced by llvm-mc and gas when given the .s file added here. This change is part of addressing PR18636. Differential Revision: http://llvm-reviews.chandlerc.com/D2597 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200255 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Add support for .cfi_startproc simpleDavid Majnemer2014-01-27
| | | | | | | | | | | | | | This commit allows LLVM MC to process .cfi_startproc directives when they are followed by an additional `simple' identifier. This signals to elide the emission of target specific CFI instructions that would normally occur initially. This fixes PR16587. Differential Revision: http://llvm-reviews.chandlerc.com/D2624 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200227 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: fix test locations/nameSaleem Abdulrasool2014-01-26
| | | | | | | Placed the MC variant diagnostics in the wrong directory accidentally. Move them into their respective architecture specific directories. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200161 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: improve diagnostics for .word directiveSaleem Abdulrasool2014-01-26
| | | | | | | | | If a complex expression was passed to the .word directive and the first part of the directive failed to parse, a secondary diagnostic would be produced that would clutter the error diagnostics. Improve the diagnostics by consuming the remainder of the statement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200160 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmParser: improve diagnostics for invalid variantsSaleem Abdulrasool2014-01-26
| | | | | | | | | An emitted diagnostic for an invalid relocation variant would place the caret on the token following the relocation variant indicator or at the end of the line if there was no following token. This change corrects the placement of the caret to point to the token. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200159 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement the missing bits corresponding to .mips_hack_elf_flags.Rafael Espindola2014-01-26
| | | | | | | | | | | | These were: * noreorder handling on the target object streamer and asm parser. * setting the initial flag bits based on the enabled features. * setting the elf header flag for micromips It is *really* depressing I am the one doing this instead of someone at mips actually taking the time to understand the infrastructure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200138 91177308-0d34-0410-b5e6-96231b3b80d8
* Move tests that just use llc from test/MC/Mips to test/MC/Codegen.Rafael Espindola2014-01-26
| | | | | | This is an expanded version of r200064. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200115 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for sparc relocation types in ELF object file.Venkatraman Govindaraju2014-01-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200112 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverting r199886 (Prevent repetitive warnings for unrecognized processors ↵Artyom Skrobov2014-01-25
| | | | | | and features) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200083 91177308-0d34-0410-b5e6-96231b3b80d8
* This reverts commit r200064 and r200051.Rafael Espindola2014-01-25
| | | | | | | | | | | | | | | | | | | r200064 depends on r200051. r200051 is broken: I tries to replace .mips_hack_elf_flags, which is a good thing, but what it replaces it with is even worse. The new emitMipsELFFlags it adds corresponds to no assembly directive, is not marked as a hack and is not even printed to the .s file. The patch also introduces more uses of hasRawTextSupport. The correct way to remove .mips_hack_elf_flags is to have the mips target streamer handle the default flags (and command line options). That way the same code path is used for asm and obj. The streamer interface should *really* correspond to what is printed in the .s file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200078 91177308-0d34-0410-b5e6-96231b3b80d8
* [Mips] Move 2 test cases from MC to CodeGen.Jack Carter2014-01-25
| | | | | | | No code changes. Just reassignment of test case files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200064 91177308-0d34-0410-b5e6-96231b3b80d8
* [Mips] TargetStreamer ELF flag Support for default and commandline options.Jack Carter2014-01-25
| | | | | | | | | | | | | | | | This patch uses a common MipsTargetSteamer interface for both MipsAsmPrinter and MipsAsmParser for recording default and commandline driven directives that affect ELF header flags. It has been noted that the .ll tests affected by this patch belong in test/Codegen/Mips. I will move them in a separate patch. Also, a number of directives do not get expressed by AsmPrinter in the resultant .s assembly such as setting the correct ASI. I have noted this in the tests and they will be addressed in later patches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200051 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix known typosAlp Toker2014-01-24
| | | | | | | Sweep the codebase for common typos. Includes some changes to visible function names that were misspelt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200018 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Correct quad register list in the asm parser.Venkatraman Govindaraju2014-01-24
| | | | | | | Add test cases to check parsing of v9 double registers and their aliased quad registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199974 91177308-0d34-0410-b5e6-96231b3b80d8
* Update the X86 assembler for .intel_syntax to produce an error for invalid baseKevin Enderby2014-01-23
| | | | | | | | | | registers in memory addresses that do not match the index register. As it does for .att_syntax. rdar://15887380 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199948 91177308-0d34-0410-b5e6-96231b3b80d8
* Update the X86 assembler for .intel_syntax to produce an error for invalidKevin Enderby2014-01-23
| | | | | | | | | | | | scale factors in memory addresses. As it does for .att_syntax. It was producing: Assertion failed: (((Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8)) && "Invalid scale!"), function CreateMem, file /Volumes/SandBox/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp, line 1133. rdar://14967214 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199942 91177308-0d34-0410-b5e6-96231b3b80d8
* Prevent repetitive warnings for unrecognized processors and featuresArtyom Skrobov2014-01-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199886 91177308-0d34-0410-b5e6-96231b3b80d8
* [Mips] TargetStreamer Support for .set mips16.Jack Carter2014-01-22
| | | | | | | | | | | This patch updates .set mips16 support which affects the ELF ABI and its flags. In addition the patch uses a common interface for both the MipsTargetSteamer and MipsObjectStreamer that the assembler uses for both ELF and ASCII output for these directives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199851 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)David Woodhouse2014-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199809 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Allow segment and address-size overrides for OUTS[BWLQ] (PR9385)David Woodhouse2014-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199808 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Allow segment and address-size overrides for MOVS[BWLQ] (PR9385)David Woodhouse2014-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199807 91177308-0d34-0410-b5e6-96231b3b80d8
* ]x86] Allow segment and address-size overrides for CMPS[BWLQ] (PR9385)David Woodhouse2014-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199806 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Allow address-size overrides for SCAS{8,16,32,64} (PR9385)David Woodhouse2014-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199805 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Allow address-size overrides for STOS[BWLQ] (PR9385)David Woodhouse2014-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199804 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)David Woodhouse2014-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199803 91177308-0d34-0410-b5e6-96231b3b80d8
* Forgot to add testcase for r198590David Majnemer2014-01-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199765 91177308-0d34-0410-b5e6-96231b3b80d8
* tools: support decoding ARM EHABI opcodes in readobjSaleem Abdulrasool2014-01-21
| | | | | | | | | | | | | | Add support to llvm-readobj to decode the actual opcodes. The ARM EHABI opcodes are a variable length instruction set that describe the operations required for properly unwinding stack frames. The primary motivation for this change is to ease the creation of tests for the ARM EHABI object emission as well as the unwinding directive handling in the ARM IAS. Thanks to Logan Chien for an extra test case! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199708 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: add support for .unwind_raw directiveSaleem Abdulrasool2014-01-21
| | | | | | | | | | | | This implements the unwind_raw directive for the ARM IAS. The unwind_raw directive takes the form of a stack offset value followed by one or more bytes representing the opcodes to be emitted. The opcode emitted will interpreted as if it were assembled by the opcode assembler via the standard unwinding directives. Thanks to Logan Chien for an extra test! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199707 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .personalityindexSaleem Abdulrasool2014-01-21
| | | | | | | | | | | | | The .personalityindex directive is equivalent to the .personality directive with the ARM EABI personality with the specific index (0, 1, 2). Both of these directives indicate personality routines, so enhance the personality directive handling to take into account personalityindex. Bonus fix: flush the UnwindContext at the beginning of a new function. Thanks to Logan Chien for additional tests! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199706 91177308-0d34-0410-b5e6-96231b3b80d8
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