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* Implement AArch64 vector load/store multiple N-element structure class SIMD(l...Hao Liu2013-10-10
* Revert "Implement AArch64 vector load/store multiple N-element structure clas...Rafael Espindola2013-10-10
* Implement AArch64 vector load/store multiple N-element structure class SIMD(l...Hao Liu2013-10-10
* Allow non-AVX form of pmovmskb to take a GR64 operand.Craig Topper2013-10-10
* AArch64: migrate ADRP relaxation test to be llvm-mc only.Tim Northover2013-10-09
* [AArch64] Add support for NEON scalar floating-point reciprocal estimate,Chad Rosier2013-10-08
* [AArch64] Add support for NEON scalar signed/unsigned integer to floating-pointChad Rosier2013-10-08
* Remove some instructions that existed to provide aliases to the assembler. Ca...Craig Topper2013-10-08
* [ARM] Improve build attributes emission.Amara Emerson2013-10-07
* [AArch64] Add support for NEON scalar arithmetic instructions:Chad Rosier2013-10-07
* [ARMv8] Add some disassembly tests for Thumb sevl/sevl.wJoey Gouly2013-10-07
* ARM: allow cortex-m0 to use hint instructionsTim Northover2013-10-07
* Remove some instructions that seem to only exist to trick the filtering check...Craig Topper2013-10-07
* Teach X86 asm parser that VMOVAPSrr and other VEX-encoded register to registe...Craig Topper2013-10-07
* Add disassembler support for long encodings for INC/DEC in 32-bit mode.Craig Topper2013-10-07
* Remove some really nasty uses of hasRawTextSupport.Rafael Espindola2013-10-05
* Implement aarch64 neon instruction set AdvSIMD (Across).Jiangning Liu2013-10-05
* reverting per requestJack Carter2013-10-04
* [MC][AsmParser] Hook for post assembly file processingJack Carter2013-10-04
* Implement aarch64 neon instruction set AdvSIMD (3V elem).Jiangning Liu2013-10-04
* [ARM] Warn on deprecated IT blocks in v8 AArch32 assembly.Amara Emerson2013-10-03
* Add XOP disassembler support. Fixes PR13933.Craig Topper2013-10-03
* Add test I forgot to git add in r191824.Rafael Espindola2013-10-02
* [SystemZ] Add comparisons of high words and memoryRichard Sandiford2013-10-01
* [SystemZ] Add comparisons of large immediates using high wordsRichard Sandiford2013-10-01
* [SystemZ] Add immediate addition involving high wordsRichard Sandiford2013-10-01
* [ARM] Introduce the 'sevl' instruction in ARMv8.Joey Gouly2013-10-01
* [SystemZ] Add truncating high-word stores (STCH and STHH)Richard Sandiford2013-10-01
* [SystemZ] Add zero-extending high-word loads (LLCH and LLHH)Richard Sandiford2013-10-01
* [SystemZ] Add sign-extending high-word loads (LBH and LHH)Richard Sandiford2013-10-01
* [SystemZ] Reapply: Add definitions of LFH and STFHRichard Sandiford2013-10-01
* This patch adds aliases for Mips sub instruction with immediate operands. Cor...Vladimir Medic2013-10-01
* [ARM] Fix Thumb(-2) diagnostic tests.Tilmann Scheller2013-09-30
* [mips][msa] Direct Object Emission for I8 instructions.Jack Carter2013-09-30
* [mips][msa] Direct Object Emission for I5 instructions.Jack Carter2013-09-30
* [mips][msa] Direct Object Emission for 2R instructions.Jack Carter2013-09-30
* [PATCH 1/4] [mips][msa] Source register of FILL instructions is GPRJack Carter2013-09-30
* [ARM] Use FileCheck instead of grep for ARM LDRD negative tests.Tilmann Scheller2013-09-30
* [ARM] Assembler: ARM LDRD with writeback requires the base register to be dif...Tilmann Scheller2013-09-30
* [ARM] Assembler: Add more negative tests for ARM LDRD.Tilmann Scheller2013-09-30
* [SystemZ] Revert r191661: Add definitions of LFH and STFHRichard Sandiford2013-09-30
* [SystemZ] Add definitions of LFH and STFHRichard Sandiford2013-09-30
* Add a few more FMA4 disassembler test cases to match the scalar set with rega...Craig Topper2013-09-30
* Various x86 disassembler fixes.Craig Topper2013-09-30
* Revert accidental commit.Craig Topper2013-09-29
* Change type of XOP flag in code emitters to a bool. Remove a some unneeded ca...Craig Topper2013-09-29
* Fix spelling intruction -> instruction.Robert Wilhelm2013-09-28
* Adding intrinsics to the llvm backend for TBM instruction set.Yunzhong Gao2013-09-27
* ARM: Teach assembler to enforce constraints for ARM LDRD destination register...Tilmann Scheller2013-09-27
* ARM: Teach assembler to enforce constraint for Thumb2 LDRD (literal/immediate...Tilmann Scheller2013-09-27
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