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* This patch implements .set dsp directive and sets appropriate feature ↵Vladimir Medic2014-03-05
| | | | | | bits.This directive is a counterpart of -mattr=dsp command line option with the exception that it does not influence elf header flags. The usage example is gives in test file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202966 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch implements .set mips32r2 directive and sets appropriate feature ↵Vladimir Medic2014-03-04
| | | | | | bits. It also introduces helper functions that are used to set and clear feature bits as necessary. This directive is a counterpart of -mips32r2 command line options with the exception that it does not influence elf header flags. The usage example is gives in test file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202807 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64]Fix improper diagnostics about offset range of load/store instructions.Kevin Qin2014-03-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202775 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Fix Intel assembly parser for [global + offset]Reid Kleckner2014-03-04
| | | | | | | | | We were dropping the displacement on the floor if we also had some immediate offset. Should fix PR19033. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202774 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] support FK_Data_2 and FK_Data_8 to fix big-endian debug dataEd Maste2014-03-03
| | | | | | | | | | This fixes invalid lengths in .debug_aranges on big-endian mips64 (lengths appear to be left-shifted by 32 bits) and in .debug_loc. Differential Revision: http://llvm-reviews.chandlerc.com/D2517 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202716 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch implements jalx instruction for Mips architecture.This ↵Vladimir Medic2014-03-03
| | | | | | instruction executes a procedure call within the current 256 MB-aligned region and change the ISA Mode from MIPS32 to microMIPS32 or MIPS16e. Usage samples for assembler and dissasembler are provided as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202706 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmParser: add missed testsSaleem Abdulrasool2014-03-03
| | | | | | The diagnostics tests were missing from the previous introduction of ifeqs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202674 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add trap on integer condition codes (Ticc) instructions to Sparc ↵Venkatraman Govindaraju2014-03-02
| | | | | | backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202670 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add return/rett instruction to Sparc backend.Venkatraman Govindaraju2014-03-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202666 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for decoding jmpl/retl/ret instruction.Venkatraman Govindaraju2014-03-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202663 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add fcmpe* instructions to Sparc backend.Venkatraman Govindaraju2014-03-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202661 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add VIS instructions to sparc backend.Venkatraman Govindaraju2014-03-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202660 91177308-0d34-0410-b5e6-96231b3b80d8
* [SparcV9] Adds support for branch on integer register instructions (BPr) and ↵Venkatraman Govindaraju2014-03-02
| | | | | | conditional moves on integer register (MOVr/FMOVr). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202628 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for parsing branches and conditional move instructions ↵Venkatraman Govindaraju2014-03-02
| | | | | | with %fcc1-%fcc3 conditional registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202616 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for parsing fcmp with %fcc registers.Venkatraman Govindaraju2014-03-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202610 91177308-0d34-0410-b5e6-96231b3b80d8
* [SparcV9] Add support for parsing branch instructions with prediction.Venkatraman Govindaraju2014-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202602 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for parsing annulled branch instructions.Venkatraman Govindaraju2014-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202599 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for parsing sparcv9 instructions addc/subc/addccc/subccc.Venkatraman Govindaraju2014-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202598 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add missing ALU instruction patterns.Venkatraman Govindaraju2014-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202597 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing FileCheck in test command line.Sasa Stankovic2014-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202594 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support to decode unimp instruction.Venkatraman Govindaraju2014-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202581 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support to decode negative simm13 operands in the sparc ↵Venkatraman Govindaraju2014-03-01
| | | | | | disassembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202578 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for decoding call instructions in the sparc disassembler.Venkatraman Govindaraju2014-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202577 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support to disassemble sparc memory instructions.Venkatraman Govindaraju2014-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202575 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for parsing sun-style section flags in ELFAsmParser.Venkatraman Govindaraju2014-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202573 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Implement writeNopData. Emit actual NOP instruction instead of just ↵Venkatraman Govindaraju2014-03-01
| | | | | | filling with zeroes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202572 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Teach SparcAsmParser to emit correct relocations for PIC code.Venkatraman Govindaraju2014-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202571 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for parsing directives in SparcAsmParser.Venkatraman Govindaraju2014-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202564 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Emit 'restore' instead of 'restore %g0, %g0, %g0'. This improves the ↵Venkatraman Govindaraju2014-03-01
| | | | | | readability of the generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202563 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed encoding of SYSCALL microMIPS instruction.Zoran Jovanovic2014-02-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202523 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert revision 202518 because of wrong commit message.Zoran Jovanovic2014-02-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202521 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix operand of SC instruction.Zoran Jovanovic2014-02-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202518 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Implement NaCl sandboxing of indirect jumps:Sasa Stankovic2014-02-28
| | | | | | | | | | * Align targets of indirect jumps to instruction bundle boundaries (in MI layer). * Add masking instructions before indirect jumps (in MC layer). Differential Revision: http://llvm-reviews.chandlerc.com/D2847 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202479 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typosAlp Toker2014-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202107 91177308-0d34-0410-b5e6-96231b3b80d8
* Asm Parser: support .error directiveSaleem Abdulrasool2014-02-23
| | | | | | | | The .error directive is similar to .err in that it will halt assembly if it is evaluated for assembly. However, it permits a user supplied message to be rendered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201999 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmParser: support .ifeqs directiveSaleem Abdulrasool2014-02-23
| | | | | | | The .ifeqs directive assembles the following code if the quoted string parameters are equal. The strings must be quoted using double quotes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201998 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .align without parametersSaleem Abdulrasool2014-02-23
| | | | | | | | .align is handled specially on certain targets. .align without any parameters on ARM indicates a default alignment (4). Handle the special case in the target parser, but fall back to the generic parser for the normal version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201988 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: support .ifneSaleem Abdulrasool2014-02-23
| | | | | | | The .ifne directive assembles the following section of code if the argument expression is non-zero. Effectively, it is equivalent to if. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201986 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: handle space properly for .ifc/.ifncSaleem Abdulrasool2014-02-23
| | | | | | | | If the strings are not quoted, the first string stops at the first comma, and the second string stops at the end of the line. Strings which contain whitespace should be quoted. Unquoted space is to be discarded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201985 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: add support for .err directiveSaleem Abdulrasool2014-02-23
| | | | | | | The .err directive produces an error whenever it is assembled. This can be useful for preventing assembly when an unexpected condition occurs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201984 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .short and .hwordSaleem Abdulrasool2014-02-23
| | | | | | | | This adds support for the .short and its alias .hword for adding literal values into the object file. This is similar to the .word directive, however, rather than inserting a value of 4 bytes, adds a 2-byte value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201968 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Support COFF string tables larger than 10MBNico Rieck2014-02-22
| | | | | | | | Offsets past the range of single-slash encoding are encoded as base64, padded to 6 characters, and prefixed with two slashes. This encoding is undocumented but used by MSVC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201940 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Make it impossible to have UnknownABI in CodeGen and Integrated ↵Daniel Sanders2014-02-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | Assembler. Summary: This removes the need to coerce UnknownABI to the default ABI (O32 for MIPS32, N64 for MIPS64 [*]) in both MipsSubtarget and MipsAsmParser. Clang has been updated to disable both possible default ABI's before enabling the ABI it intends to use. [*] N64 being the default for MIPS64 is not actually correct. However N32 is not fully implemented/tested yet. Depends on: D2830 Reviewers: jacksprat, matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D2832 Differential Revision: http://llvm-reviews.chandlerc.com/D2846 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201792 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmParser: Disable Darwin-style macro argument expansion on non-darwin targets.Benjamin Kramer2014-02-20
| | | | | | There is code in the wild that relies on $0 not being expanded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201784 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: Assembly parsing of broadcast semantic in AVX-512; imlemented by ↵Elena Demikhovsky2014-02-20
| | | | | | | | | Nis Zinovy (zinovy.y.nis@intel.com) Fixed truncate i32 to i1; a test will be provided in the next commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201757 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add explicit N32 and N64 tests to nabi-regs.s testDaniel Sanders2014-02-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201684 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove special FP opcode maps and instead add enough MRM_XX formats to ↵Craig Topper2014-02-19
| | | | | | handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201649 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of ↵Craig Topper2014-02-19
| | | | | | 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201641 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: support required parametersSaleem Abdulrasool2014-02-19
| | | | | | | | | | | This enhances the macro parser to parse and handle parameter qualifications, which is needed to support required formal parameters in macro definitions. A required parameter may not be defaulted (though providing a default value is accepted with a warning). This improves GAS compatibility. Partially addresses PR9248. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201630 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the arm assembler so that this malformed instruction:Kevin Enderby2014-02-17
| | | | | | | | | | | | | | | | | | | ldrd r6, r7 [r2, #15] simply gives an error and does not triggers an assertion. As Jim points out, the diagnostic is really strange here, but fixing that would be more complicated. The missing comma results in the parser expecting a construct like r2[2], which is the vector index thing the error message is talking about. That's not what the user intended, though, and there's nothing else in the instruction that looks at all like a vector. Yet more fallout from not having a real parser here and trying to do context-free generic matching for addressing modes. rdar://15097243 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201531 91177308-0d34-0410-b5e6-96231b3b80d8
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