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* Fix operand type for x86 pmadd_ub_sw intrinsic.Craig Topper2011-11-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143455 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure we use the right insertion point when instcombine replaces a PHI ↵Eli Friedman2011-11-01
| | | | | | with another instruction. (Specifically, don't insert an arbitrary instruction before a PHI.) Fixes PR11275. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143437 91177308-0d34-0410-b5e6-96231b3b80d8
* Move x86-specific tests into X86 folder.Eli Friedman2011-11-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143424 91177308-0d34-0410-b5e6-96231b3b80d8
* Move another test requiring x86 into X86 directory.Eli Friedman2011-11-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143421 91177308-0d34-0410-b5e6-96231b3b80d8
* Move test requiring x86 backend into X86 directory.Eli Friedman2011-11-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143420 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the actual tests to match the input directory rename (duh)Matt Beaumont-Gay2011-10-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143404 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename "TestObjectFiles" to "Inputs" (like the pattern for Clang tests)Matt Beaumont-Gay2011-10-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143400 91177308-0d34-0410-b5e6-96231b3b80d8
* Move test to the X86 directory, note the PR number and only run MC once.Rafael Espindola2011-10-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143352 91177308-0d34-0410-b5e6-96231b3b80d8
* More not-crashing NEON disassembly updates for the vld refactoring.Owen Anderson2011-10-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143351 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix operand type for int_x86_ssse3_phadd_sw_128 intrinsicCraig Topper2011-10-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143336 91177308-0d34-0410-b5e6-96231b3b80d8
* Test case for X86 FS/GS Base intrinsicsCraig Topper2011-10-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143332 91177308-0d34-0410-b5e6-96231b3b80d8
* Begin adding AVX2 instructions. No selection support yet other than intrinsics.Craig Topper2011-10-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143331 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch new .file directive emission off by default, change llc's flag for it toNick Lewycky2011-10-31
| | | | | | | -enable-dwarf-directory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143326 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply commit 143214 with a fix: m_ICmp doesn't match conditionsDuncan Sands2011-10-30
| | | | | | | | | | | | | with the given predicate, it matches any condition and returns the predicate - d'oh! Original commit message: The expression icmp eq (select (icmp eq x, 0), 1, x), 0 folds to false. Spotted by my super-optimizer in 186.crafty and 450.soplex. We really need a proper infrastructure for handling generalizations of this kind of thing (which occur a lot), however this case is so simple that I decided to go ahead and implement it directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143318 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Emit logical shift by constant splat of <16 x i8> as a <8 x i16> shift ↵Benjamin Kramer2011-10-30
| | | | | | and zero out the bits where zeros should've been shifted in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143315 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix return type for X86 mpsadbw instrinsic. The instruction takes in a ↵Craig Topper2011-10-30
| | | | | | vector of 8-bit integers, but produces a vector of 16-bit integers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143313 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix pr11266.Nadav Rotem2011-10-30
| | | | | | | | | | | On x86: (shl V, 1) -> add V,V Hardware support for vector-shift is sparse and in many cases we scalarize the result. Additionally, on sandybridge padd is faster than shl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143311 91177308-0d34-0410-b5e6-96231b3b80d8
* Stabilize the test by specifying an exact cpu targetNadav Rotem2011-10-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143307 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new DAGCombine optimization for BUILD_VECTOR.Nadav Rotem2011-10-29
| | | | | | | | | If all of the inputs are zero/any_extended, create a new simple BV which can be further optimized by other BV optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143297 91177308-0d34-0410-b5e6-96231b3b80d8
* Force SSE for this test.Benjamin Kramer2011-10-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143291 91177308-0d34-0410-b5e6-96231b3b80d8
* SimplifyLibCalls: Use IRBuilder.CreateGlobalString when creating a string ↵Benjamin Kramer2011-10-29
| | | | | | | | for printf->puts, which correctly sets the unnamed_addr bit on the resulting GlobalVariable. Fixes PR11264. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143289 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r143214; it's breaking a bunch of stuff.Eli Friedman2011-10-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143265 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r143206, as there are still some failing tests.Dan Gohman2011-10-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143262 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark ↵NAKAMURA Takumi2011-10-28
| | | | | | "REQUIRES: asserts" for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143247 91177308-0d34-0410-b5e6-96231b3b80d8
* Add Thumb2 alias for "mov Rd, #imm" to "mvn Rd, #~imm".Jim Grosbach2011-10-28
| | | | | | | | | | | | When '~imm' is encodable as a t2_so_imm but plain 'imm' is not. For example, mov r2, #-3 becomes mvn r2, #2 rdar://10349224 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143235 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix illegal disassembly testcase.Owen Anderson2011-10-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143231 91177308-0d34-0410-b5e6-96231b3b80d8
* The expression icmp eq (select (icmp eq x, 0), 1, x), 0 folds to false.Duncan Sands2011-10-28
| | | | | | | | | | Spotted by my super-optimizer in 186.crafty and 450.soplex. We really need a proper infrastructure for handling generalizations of this kind of thing (which occur a lot), however this case is so simple that I decided to go ahead and implement it directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143214 91177308-0d34-0410-b5e6-96231b3b80d8
* A shift of a power of two is a power of two or zero.Duncan Sands2011-10-28
| | | | | | | For completeness - not spotted in the wild. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143211 91177308-0d34-0410-b5e6-96231b3b80d8
* Fold icmp ugt (udiv X, Y), X to false. Spotted by my super-optimizerDuncan Sands2011-10-28
| | | | | | | in 186.crafty. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143209 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r143202, with a manual decoding hook for SWP. This change ↵Owen Anderson2011-10-28
| | | | | | inadvertantly exposed a decoding ambiguity between SWP and CPS that the auto-generated decoder can't handle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143208 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r143177 and r143179 (reverting r143188), with schedulerDan Gohman2011-10-28
| | | | | | | | | | fixes: Use a separate register, instead of SP, as the calling-convention resource, to avoid spurious conflicts with actual uses of SP. Also, fix unscheduling of calling sequences, which can be triggered by pseudo-two-address dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143206 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 ADD/SUB instructions encoding selection outside IT block.Jim Grosbach2011-10-28
| | | | | | | | | | | | Outside an IT block, "add r3, #2" should select a 32-bit wide encoding rather than generating an error indicating the 16-bit encoding is only legal in an IT block (outside, the 'S' suffic is required for the 16-bit encoding). rdar://10348481 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143201 91177308-0d34-0410-b5e6-96231b3b80d8
* test/MC/AsmParser/2011-09-06-NoNewline.s: Add explicit -mtriple=i386. It ↵NAKAMURA Takumi2011-10-28
| | | | | | | | | uses X86 instruction. FIXME: Would it be reproduced without target-specific operands? FIXME: Why run llvm-mc as the same input by 3 times? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143195 91177308-0d34-0410-b5e6-96231b3b80d8
* Dwarf: [PR11022] Fix emitting DW_AT_const_value(>i64), to be ↵NAKAMURA Takumi2011-10-28
| | | | | | | | | | | | host-endian-neutral. Don't assume APInt::getRawData() would hold target-aware endianness nor host-compliant endianness. rawdata[0] holds most lower i64, even on big endian host. FIXME: Add a testcase for big endian target. FIXME: Ditto on CompileUnit::addConstantFPValue() ? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143194 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/2010-08-10-DbgConstant.ll: Add explicit ↵NAKAMURA Takumi2011-10-28
| | | | | | -mtriple=i686-linux. It must be for elf! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143189 91177308-0d34-0410-b5e6-96231b3b80d8
* Speculatively disable Dan's commits 143177 and 143179 to see ifDuncan Sands2011-10-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | it fixes the dragonegg self-host (it looks like gcc is miscompiled). Original commit messages: Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW on every node as it legalizes them. This makes it easier to use hasOneUse() heuristics, since unneeded nodes can be removed from the DAG earlier. Make LegalizeOps visit the DAG in an operands-last order. It previously used operands-first, because LegalizeTypes has to go operands-first, and LegalizeTypes used to be part of LegalizeOps, but they're now split. The operands-last order is more natural for several legalization tasks. For example, it allows lowering code for nodes with floating-point or vector constants to see those constants directly instead of seeing the lowered form (often constant-pool loads). This makes some things somewhat more complicated today, though it ought to allow things to be simpler in the future. It also fixes some bugs exposed by Legalizing using RAUW aggressively. Remove the part of LegalizeOps that attempted to patch up invalid chain operands on libcalls generated by LegalizeTypes, since it doesn't work with the new LegalizeOps traversal order. Instead, define what LegalizeTypes is doing to be correct, and transfer the responsibility of keeping calls from having overlapping calling sequences into the scheduler. Teach the scheduler to model callseq_begin/end pairs as having a physical register definition/use to prevent calls from having overlapping calling sequences. This is also somewhat complicated, though there are ways it might be simplified in the future. This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others. Please direct high-level questions about this patch to management. Delete #if 0 code accidentally left in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143188 91177308-0d34-0410-b5e6-96231b3b80d8
* Always use the string pool, even when it makes the .o larger. This may helpNick Lewycky2011-10-28
| | | | | | | | tools that read the debug info in the .o files by making the DIE sizes more consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143186 91177308-0d34-0410-b5e6-96231b3b80d8
* LFTR should avoid a type mismatch with null pointer IVs.Andrew Trick2011-10-28
| | | | | | | Fixes rdar://10359193 Indvar LinearFunctionTestReplace assertion git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143183 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUWDan Gohman2011-10-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on every node as it legalizes them. This makes it easier to use hasOneUse() heuristics, since unneeded nodes can be removed from the DAG earlier. Make LegalizeOps visit the DAG in an operands-last order. It previously used operands-first, because LegalizeTypes has to go operands-first, and LegalizeTypes used to be part of LegalizeOps, but they're now split. The operands-last order is more natural for several legalization tasks. For example, it allows lowering code for nodes with floating-point or vector constants to see those constants directly instead of seeing the lowered form (often constant-pool loads). This makes some things somewhat more complicated today, though it ought to allow things to be simpler in the future. It also fixes some bugs exposed by Legalizing using RAUW aggressively. Remove the part of LegalizeOps that attempted to patch up invalid chain operands on libcalls generated by LegalizeTypes, since it doesn't work with the new LegalizeOps traversal order. Instead, define what LegalizeTypes is doing to be correct, and transfer the responsibility of keeping calls from having overlapping calling sequences into the scheduler. Teach the scheduler to model callseq_begin/end pairs as having a physical register definition/use to prevent calls from having overlapping calling sequences. This is also somewhat complicated, though there are ways it might be simplified in the future. This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others. Please direct high-level questions about this patch to management. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143177 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM Allow 'q' registers in VLD/VST vector lists.Jim Grosbach2011-10-28
| | | | | | | | Just treat it as if the constituent D registers where specified. rdar://10348896 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143167 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the Alpha backend.Dan Gohman2011-10-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143164 91177308-0d34-0410-b5e6-96231b3b80d8
* Add testcase for r143162.Owen Anderson2011-10-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143163 91177308-0d34-0410-b5e6-96231b3b80d8
* Also set addrmode6 alignment when align==size.Jakob Stoklund Olesen2011-10-27
| | | | | | | Previously, we were only setting the alignment bits on over-aligned loads and stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143160 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid partial CPSR dependency from loop backedges. rdar://10357570Evan Cheng2011-10-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143145 91177308-0d34-0410-b5e6-96231b3b80d8
* tests: Rip out a bunch of now unused test code relating to use of llvm-gcc ↵Daniel Dunbar2011-10-27
| | | | | | in LLVM tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143143 91177308-0d34-0410-b5e6-96231b3b80d8
* tests: Remove llvm2cpp, I'm pretty sure no one uses this.Daniel Dunbar2011-10-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143142 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply commit 143028 with a fix: the problem was casting a ConstantExpr MulDuncan Sands2011-10-27
| | | | | | | | | | | | using BinaryOperator (which only works for instructions) when it should have been a cast to OverflowingBinaryOperator (which also works for constants). While there, correct a few other dubious looking uses of BinaryOperator. Thanks to Chad Rosier for the testcase. Original commit message: My super-optimizer noticed that we weren't folding this expression to true: (x *nsw x) sgt 0, where x = (y | 1). This occurs in 464.h264ref. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143125 91177308-0d34-0410-b5e6-96231b3b80d8
* 2>&1 doesn't work here, it just creates an empty file called "&1"Benjamin Kramer2011-10-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143117 91177308-0d34-0410-b5e6-96231b3b80d8
* Changed test to check for correct load size instead of shift as the shift ↵Pete Cooper2011-10-27
| | | | | | might change if optimised git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143116 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix andKevin Enderby2011-10-27
| | | | | | | | not depend on In32BitMode. Use the sysexitq mnemonic for the version with the REX.W prefix and only allow it only In64BitMode. rdar://9738584 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143112 91177308-0d34-0410-b5e6-96231b3b80d8
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