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* [x86] Fix a bug in the v8i16 shuffling exposed by the new splat-likeChandler Carruth2014-06-28
| | | | | | | | | | | lowering for v16i8. ASan and some bots caught this bug with existing test cases. Fixing it even fixed a miscompile with one of the test cases. I'm still a bit suspicious of this test case as I've not taken a proper amount of time to think about it, but the fix here is strict goodness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211976 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix this test to not write to the source tree, and instead to write toChandler Carruth2014-06-28
| | | | | | | a temporary file. This fixes the test in cases where the source tree is mounted read-only. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211975 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Add handling for splat-like widenings of v16i8 shuffles.Chandler Carruth2014-06-28
| | | | | | | | | | | | | | | | These show up really frequently, not the least with actual splats. =] We lowered these quite badly before. The new code path tries to widen i8 shuffles to i16 shuffles in a splat-like way. There are still some inefficiencies in our i16 splat logic though, so we aren't really done here. Also, for certain patterns (bit of a gather-and-splat) we still generate pretty silly code, and I've left a fixme for addressing it. However, I'm not actually worried about this code pattern as much. The old shuffle lowering generates a 29 instruction monstrosity for it that should execute much more slowly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211974 91177308-0d34-0410-b5e6-96231b3b80d8
* This file wasn't supposed to be checked inDavid Majnemer2014-06-28
| | | | | | | | | This was generated while trying to debug a test, it shouldn't have been checked in. Thanks to Alexander Kornienko for spotting this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211973 91177308-0d34-0410-b5e6-96231b3b80d8
* [RuntimeDyld] Make sure that RuntimeDyld regression tests only run for targetsLang Hames2014-06-27
| | | | | | | | | | that have been enabled. Without this, testers will fail when llvm-rtdyld is invoked with triples for unsupported targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211969 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Temporary hack to try cleaning extra .s file from bots."Matt Arsenault2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211967 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporary hack to try cleaning extra .s file from bots.Matt Arsenault2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211963 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Fix memset ICE when memset value is f128.Chad Rosier2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211960 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-cov: Support specifying multiple source filesJustin Bogner2014-06-27
| | | | | | | | | Make llvm-cov compatible with gcov for cases where multiple files are specified on the command line. That is, loop over each one and report coverage, and report errors on stderr only rather than via return code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211959 91177308-0d34-0410-b5e6-96231b3b80d8
* [RuntimeDyld] Add a framework for testing relocation logic in RuntimeDyld.Lang Hames2014-06-27
| | | | | | | | | | | | | | | | | | | | | | This patch adds a "-verify" mode to the llvm-rtdyld utility. In verify mode, llvm-rtdyld will test supplied expressions against the linked program images that it creates in memory. This scheme can be used to verify the correctness of the relocation logic applied by RuntimeDyld. The expressions to test will be read out of files passed via the -check option (there may be more than one of these). Expressions to check are extracted from lines of the form: # rtdyld-check: <expression> This system is designed to fit the llvm-lit regression test workflow. It is format and target agnostic, and supports verification of images linked for remote targets. The expression language is defined in llvm/include/llvm/RuntimeDyldChecker.h . Examples can be found in test/ExecutionEngine/RuntimeDyld. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211956 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Fix another bug hit when bootstrapping with the new shuffleChandler Carruth2014-06-27
| | | | | | | | | | | | | lowering. For maximum irony, I had already discovered this bug, diagnosed it, and left FIXMEs about it in the test cases. =[ I just failed to go back over those until after i had reduced a bootstrap miscompile down to a single TU, stared at the assembly for an hour, and figured out the bug. Again. Oh well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211955 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Add reflect intrinsic (better than matching by function name)Justin Holewinski2014-06-27
| | | | | | Also clean up some of the logic in NVVMReflect.cpp while we're messing around in there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211948 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Add 'b' asm constraintJustin Holewinski2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211946 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Error out if initializer is given for variable in an address space ↵Justin Holewinski2014-06-27
| | | | | | that does not support initialization git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211943 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Add support for .managed variables for UVMJustin Holewinski2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211942 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Emit .weak linkage for link_once, weak, available_externally, and ↵Justin Holewinski2014-06-27
| | | | | | common linkage git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211941 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Fix handling of ldg/ldu intrinsics.Justin Holewinski2014-06-27
| | | | | | | | | | The address space of the pointer must be global (1) for these intrinsics. There must also be alignment metadata attached to the intrinsic calls, e.g. %val = tail call i32 @llvm.nvvm.ldu.i.global.i32.p1i32(i32 addrspace(1)* %ptr), !align !0 !0 = metadata !{i32 4} git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211939 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Clean up argument lowering code and properly handle alignment for ↵Justin Holewinski2014-06-27
| | | | | | structs and vectors git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211938 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Add support for [SHL,SRA,SRL]_PARTSJustin Holewinski2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211936 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Implement fma and imad contraction as target DAGCombiner patternsJustin Holewinski2014-06-27
| | | | | | This also introduces DAGCombiner patterns for mul.wide to multiply two smaller integers and produce a larger integer git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211935 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Add support for efficient rotate instructions on SM 3.2+Justin Holewinski2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211934 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Add missing isel patterns for 64-bit atomicsJustin Holewinski2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211933 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Add isel patterns for bit-field extract (bfe)Justin Holewinski2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211932 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Add support for isspacep instructionJustin Holewinski2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211931 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Add support for envreg readsJustin Holewinski2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211930 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Emit .weak when linkage is not external, internal, or privateJustin Holewinski2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211926 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Fix a miscompile in the new shuffle lowering uncovered byChandler Carruth2014-06-27
| | | | | | | | | a bootstrap. I managed to mis-remember how PACKUS worked on x86, and was using undef for the high bytes instead of zero. The fix is fairly obvious. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211922 91177308-0d34-0410-b5e6-96231b3b80d8
* IR: Add COMDATs to the IRDavid Majnemer2014-06-27
| | | | | | | | | | | | | | | | This new IR facility allows us to represent the object-file semantic of a COMDAT group. COMDATs allow us to tie together sections and make the inclusion of one dependent on another. This is required to implement features like MS ABI VFTables and optimizing away certain kinds of initialization in C++. This functionality is only representable in COFF and ELF, Mach-O has no similar mechanism. Differential Revision: http://reviews.llvm.org/D4178 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211920 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix test so it doesn't try to write out temporary files into the test tree.David Blaikie2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211916 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Fix associative sections on COFFDavid Majnemer2014-06-27
| | | | | | | | | COFF sections in MC were represented by a tuple of section-name and COMDAT-name. This is not sufficient to represent a .text section associated with another .text section; we need a way to distinguish between the key section and the one marked associative. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211913 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Don't crash on unhandled instruction in promote allocaMatt Arsenault2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211906 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndexUlrich Weigand2014-06-27
| | | | | | | | | | | | | | | | | | | | | | | | I've run into a bug where current LLVM at -O0 (with fast-isel) generated invalid code like: ld 0, 20936(1) # 8-byte Folded Reload stw 12, 10348(0) stw 12, 10344(0) The underlying vreg had been introduced as base register by the Local Stack Slot Allocation pass. That register was constrained to G8RC by PPCRegisterInfo::materializeFrameBaseRegister to match the ADDI instruction used to set it, but it was *not* constrained to G8RC_NOX0 to fit the *use* of the register in an address. That should have happened in PPCRegisterInfo::resolveFrameIndex. This patch adds an appropriate constrainRegClass call. Reviewed by Hal Finkel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211897 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Teach the target combine step to aggressively fold pshufd insturcions.Chandler Carruth2014-06-27
| | | | | | | | | | | | | Summary: This allows it to fold pshufd instructions across intervening half-shuffles and other noise. This pattern actually shows up in the generic lowering tests, but I've also added direct tests using intrinsics to make sure that the specific desired functionality is working even if the lowering stuff changes in the future. Differential Revision: http://reviews.llvm.org/D4292 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211892 91177308-0d34-0410-b5e6-96231b3b80d8
* [ELF][Mips] Fix recognition of MIPS 64-bit arch in the ↵Simon Atanasyan2014-06-27
| | | | | | ELFObjectFile:getArch() method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211891 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Teach the target-specific combining how to aggressively foldChandler Carruth2014-06-27
| | | | | | | | | | | | | | | | | | half-shuffles, even looking through intervening instructions in a chain. Summary: This doesn't happen to show up with any test cases I've found for the current shuffle lowering, but previous attempts would benefit from this and it seems generally useful. I've tested it directly using intrinsics, which also shows that it will work with hand vectorized code as well. Note that even though pshufd isn't directly used in these tests, it gets exercised because we combine some of the half shuffles into a pshufd first, and then merge them. Differential Revision: http://reviews.llvm.org/D4291 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211890 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Teach the X86 backend to DAG-combine SSE2 shuffles that areChandler Carruth2014-06-27
| | | | | | | | | | | | | | | | | trivially redundant. This fixes several cases in the new vector shuffle lowering algorithm which would generate redundant shuffle instructions for the sake of simplicity. I'm also deleting a testcase which was somewhat ridiculous. It was checking for a bug in 2007 about incorrectly transforming shuffles by looking for the string "-86" in the output of a pretty substantial function. This test case doesn't seem to have any value at this point. Differential Revision: http://reviews.llvm.org/D4240 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211889 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Begin a significant overhaul of how vector lowering is done in theChandler Carruth2014-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | x86 backend. This sketches out a new code path for vector lowering, hidden behind an off-by-default flag while it is under development. The fundamental idea behind the new code path is to aggressively break down the problem space in ways that ease selecting the odd set of instructions available on x86, and carefully avoid scalarizing code even when forced to use older ISAs. Notably, this starts off restricting itself to SSE2 and implements the complete vector shuffle and blend space for 128-bit vectors in SSE2 without scalarizing. The plan is to layer on top of this ISA extensions where we can bail out of the complex SSE2 lowering and opt for a cheaper, specialized instruction (or set of instructions). It also needs to be generalized to AVX and AVX512 vector widths. Currently, this does a decent but not perfect job for SSE2. There are some specific shortcomings that I plan to address: - We need a peephole combine to fold together shuffles where possible. There are cases where a previous shuffle could be modified slightly to arrange for elements to be in the correct position and a later shuffle eliminated. Doing this eagerly added quite a bit of complexity, and so my plan is to combine away these redundancies afterward. - There are a lot more clever ways to use unpck and pack that need to be added. This is essential for real world shuffles as it turns out... Once SSE2 is polished a bit I should be able to get interesting numbers on performance improvements on benchmarks conducive to vectorization. All of this will be off by default until it is functionally equivalent of course. Differential Revision: http://reviews.llvm.org/D4225 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211888 91177308-0d34-0410-b5e6-96231b3b80d8
* Added instruction combine to transform few more negative values addition to ↵Dinesh Dwivedi2014-06-27
| | | | | | | | | | | | | | subtraction (Part 3) This patch enables transforms for (x + (~(y | c) + 1) --> x - (y | c) if c is odd Differential Revision: http://reviews.llvm.org/D4210 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211881 91177308-0d34-0410-b5e6-96231b3b80d8
* GlobalOpt: Fix constantfold-initializers.ll testDavid Majnemer2014-06-27
| | | | | | | | | The test added in r211762 was sloppy, the correct initializer wasn't added to @llvm.global_ctors Spotted by Pasi Parviainen! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211879 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Revert "Revert "PR20038: DebugInfo: Inlined call sites where the ↵David Blaikie2014-06-27
| | | | | | | | | | | caller has debug info but the call itself has no debug location.""" Reverting this again, didn't mean to commit it - while r211872 fixes one of the issues here, there are still others to figure out and address. This reverts commit r211871. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211873 91177308-0d34-0410-b5e6-96231b3b80d8
* ArgumentPromotion: Propagate debug locations on calls for which arguments ↵David Blaikie2014-06-27
| | | | | | are promoted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211872 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Revert "PR20038: DebugInfo: Inlined call sites where the caller has ↵David Blaikie2014-06-27
| | | | | | | | debug info but the call itself has no debug location."" This reverts commit r211724. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211871 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineScheduler: add some book-keeping to fix an assert.Andrew Trick2014-06-27
| | | | | | | | Fixe for Bug 20057 - Assertion failied in llvm::SUnit* llvm::SchedBoundary::pickOnlyChoice(): Assertion `i <= (HazardRec->getMaxLookAhead() + MaxObservedStall) && "permanent hazard"' Thanks to Chad for the test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211865 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Add some testcases for promote alloca pass.Matt Arsenault2014-06-27
| | | | | | | More complicated GEPs are skipped. Add some tests to actually stress this skipping. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211859 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] AVX512: Add vbroadcasti*Adam Nemet2014-06-27
| | | | | | | | | For now I used a separate template for these sub-vector/tuple broadcasts rather than sharing the mem variants with avx512_int_broadcast_rm. <rdar://problem/17402869> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211828 91177308-0d34-0410-b5e6-96231b3b80d8
* [StackMaps] Enable patchpoint liveness analysis per default.Juergen Ributzka2014-06-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211817 91177308-0d34-0410-b5e6-96231b3b80d8
* [Stackmaps] Remove the liveness calculation for stackmap intrinsics.Juergen Ributzka2014-06-26
| | | | | | | | | | There is no need to calculate the liveness information for stackmaps. The liveness information is still available for the patchpoint intrinsic and that is also the intended usage model. Related to <rdar://problem/17473725> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211816 91177308-0d34-0410-b5e6-96231b3b80d8
* GVN: Preserve invariant.load metadataArnold Schwaighofer2014-06-26
| | | | | | | | | | | If both instructions to be replaced are marked invariant the resulting instruction is invariant. rdar://13358910 Fix by Erik Eckstein! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211801 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add FP mode bits to binary.Matt Arsenault2014-06-26
| | | | | | | | The default rounding mode to initialize the mode register needs to be reported to the runtime. Fill in other bits a kernel may be interested in setting for future use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211791 91177308-0d34-0410-b5e6-96231b3b80d8
* Added parsing co-processor names starting with "cr"Renato Golin2014-06-26
| | | | | | | | | | Additional compliant GAS names for coprocessor register name are enabled for all instruction with parameter MCK_CoprocReg: LDC,LDC2,STC,STC2,CDP,CDP2,MCR,MCR2,MCRR,MCRR2,MRC,MRC2,MRRC,MRRC2 Patch by Andrey Kuharev. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211776 91177308-0d34-0410-b5e6-96231b3b80d8