| Commit message (Expand) | Author | Age |
|---|
| * | Remove the SystemZ backend. | Dan Gohman | 2011-10-24 |
| * | ARM assembly parsing and encoding for VLD1 w/ writeback. | Jim Grosbach | 2011-10-24 |
| * | Don't crash on variable insertelement on ARM. PR10258. | Eli Friedman | 2011-10-24 |
| * | Check the visibility of the global variable before placing it into the stubs | Bill Wendling | 2011-10-24 |
| * | ARM assembly parsing and encoding for VLD1 w/ writeback. | Jim Grosbach | 2011-10-24 |
| * | Now that we look at all the header PHIs, we need to consider all the header PHIs | Nick Lewycky | 2011-10-24 |
| * | Fix a NEON disassembly case that was broken in the recent refactorings. As m... | Owen Anderson | 2011-10-24 |
| * | Remove the explicit request for "Latency" scheduling from MSP430, | Dan Gohman | 2011-10-24 |
| * | Change the default scheduler from Latency to ILP, since Latency | Dan Gohman | 2011-10-24 |
| * | Update test for r142801. | Jim Grosbach | 2011-10-24 |
| * | XFAIL test on leak checkers. | Benjamin Kramer | 2011-10-24 |
| * | Remove return heuristics from the static branch probabilities, and | Chandler Carruth | 2011-10-24 |
| * | Reapply r142781 with fix. Original message: | Nick Lewycky | 2011-10-24 |
| * | A dead malloc, a free(NULL) and a free(undef) are all trivially dead | Nick Lewycky | 2011-10-24 |
| * | Speculatively revert r142781. Bots are showing | Nick Lewycky | 2011-10-24 |
| * | Enhance SCEV's brute force loop analysis to handle multiple PHI nodes in the | Nick Lewycky | 2011-10-23 |
| * | Add X86 SARX, SHRX, and SHLX instructions. | Craig Topper | 2011-10-23 |
| * | Teach the BranchProbabilityInfo pass to print its results, and use that | Chandler Carruth | 2011-10-23 |
| * | Completely re-write the algorithm behind MachineBlockPlacement based on | Chandler Carruth | 2011-10-23 |
| * | Add X86 RORX instruction | Craig Topper | 2011-10-23 |
| * | The element insertion code in scalar replacement doesn't handle incorrect | Cameron Zwarich | 2011-10-23 |
| * | Add X86 MULX instruction for disassembler. | Craig Topper | 2011-10-23 |
| * | Oops! Fix test I forgot to submit as part of r142735. | Nick Lewycky | 2011-10-22 |
| * | A non-escaping malloc in the entry block is not unlike an alloca. Do dead-store | Nick Lewycky | 2011-10-22 |
| * | Make SCEV's brute force analysis stronger in two ways. Firstly, we should be | Nick Lewycky | 2011-10-22 |
| * | Fix pr11193. | Nadav Rotem | 2011-10-22 |
| * | Assembly parsing for 4-register sequential variant of VLD2. | Jim Grosbach | 2011-10-21 |
| * | Assembly parsing for 2-register sequential variant of VLD2. | Jim Grosbach | 2011-10-21 |
| * | Remap blockaddress correctly when inlining a function. Fixes PR10162. | Eli Friedman | 2011-10-21 |
| * | Assembly parsing for 4-register variant of VLD1. | Jim Grosbach | 2011-10-21 |
| * | Assembly parsing for 3-register variant of VLD1. | Jim Grosbach | 2011-10-21 |
| * | Extend instcombine's shufflevector simplification to handle more cases where ... | Eli Friedman | 2011-10-21 |
| * | ARM VLD parsing and encoding. | Jim Grosbach | 2011-10-21 |
| * | Fix pr11194. When promoting and splitting integers we need to use | Nadav Rotem | 2011-10-21 |
| * | Don't hard code the desired alignment for loops -- it isn't 16-bytes on | Chandler Carruth | 2011-10-21 |
| * | 1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC t... | Nadav Rotem | 2011-10-21 |
| * | Add loop aligning to MachineBlockPlacement based on review discussion so | Chandler Carruth | 2011-10-21 |
| * | Add a very basic test for MachineBlockPlacement. This is essentially the | Chandler Carruth | 2011-10-21 |
| * | Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with ... | Craig Topper | 2011-10-21 |
| * | Revert r142618, r142622, and r142624, which were based on an incorrect readin... | Owen Anderson | 2011-10-20 |
| * | Fix decoding tests for fixed MSR encodings. | Owen Anderson | 2011-10-20 |
| * | Fix tests for corrected MSR encodings. | Owen Anderson | 2011-10-20 |
| * | ARM VLD1/VST1 (one register, no writeback) assembly parsing and encoding. | Jim Grosbach | 2011-10-20 |
| * | Tidy up formatting. | Jim Grosbach | 2011-10-20 |
| * | ARM VTBX (one register) assembly parsing and encoding. | Jim Grosbach | 2011-10-20 |
| * | Refactor code from inlining and globalopt that checks whether a function defi... | Eli Friedman | 2011-10-20 |
| * | "@string = constant i8 0" is a value i8* string of length zero. Analyze that | Nick Lewycky | 2011-10-20 |
| * | Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :( | Chad Rosier | 2011-10-20 |
| * | Fix TLS lowering bug. The CopyFromReg must be glued to the TLSCALL. rdar://10... | Evan Cheng | 2011-10-19 |
| * | Improve code generation for vselect on SSE2: | Nadav Rotem | 2011-10-19 |
