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* This patch is in preparation for adding medium code model support to theBill Schmidt2012-11-14
| | | | | | | | | | | | | | | | PPC64 target. The five tests modified herein test code generation that is sensitive to the code model selected. So I've added -code-model=small to the RUN commands for each. Since small code model is the default, this has no effect for now; but this prepares us for eventually changing the default to medium code model for PPC64. Test changes verified with small and medium code model as default on powerpc64-unknown-linux-gnu. All tests continue to pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167999 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure to not get AVX code on an AVX-capable host. Revealed in r167967.Jakub Staszak2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167989 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the ↵NAKAMURA Takumi2012-11-14
| | | | | | failure on i686 hosts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167988 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the CellSPU port.Eric Christopher2012-11-14
| | | | | | | Approved by Chris Lattner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167984 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/X86/memset.ll: FileCheck-ize, and add another case on +avx.NAKAMURA Takumi2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167975 91177308-0d34-0410-b5e6-96231b3b80d8
* Added multiclass for post-increment load instructions.Jyotsna Verma2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167974 91177308-0d34-0410-b5e6-96231b3b80d8
* Force CPU in test so we don't accidentally get AVX code on an AVX-capable host.Benjamin Kramer2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167973 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove DOS line endings.Jakub Staszak2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167968 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Enable SSE memory intrinsics even when stack alignment is less than 16 ↵Benjamin Kramer2012-11-14
| | | | | | | | | | | | | | | | | | bytes. The stack realignment code was fixed to work when there is stack realignment and a dynamic alloca is present so this shouldn't cause correctness issues anymore. Note that this also enables generation of AVX instructions for memset under the assumptions: - Unaligned loads/stores are always fast on CPUs supporting AVX - AVX is not slower than SSE We may need some tweaked heuristics if one of those assumptions turns out not to be true. Effectively reverts r58317. Part of PR2962. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167967 91177308-0d34-0410-b5e6-96231b3b80d8
* The code pattern "imm0_255_neg" is used for checking if an immediate value ↵Nadav Rotem2012-11-14
| | | | | | | | | | | | | is a small negative number. This patch changes the definition of negative from -0..-255 to -1..-255. I am changing this because of a bug that we had in some of the patterns that assumed that "subs" of zero does not set the carry flag. rdar://12028498 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167963 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Implement custom lowering of loads/stores for i1Justin Holewinski2012-11-14
| | | | | | | | | Loads from i1 become loads from i8 followed by trunc Stores to i1 become zext to i8 followed by store to i8 Fixes PR13291 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167948 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix really stupid ARM EHABI info generation bug: we should not emitAnton Korobeynikov2012-11-14
| | | | | | | | eh table and handler data if there are no landing pads in the function. Patch by Logan Chien with some cleanups from me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167945 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Better diagnostics for 32-bit vs. 64-bit mode mismatches.Jim Grosbach2012-11-14
| | | | | | | | | | When an instruction as written requires 32-bit mode and we're assembling in 64-bit mode, or vice-versa, issue a more specific diagnostic about what's wrong. rdar://12700702 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167937 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit relocations from .debug_aranges to .debug_info for asm filesAlexey Samsonov2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167926 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle DAG CSE adding new uses during ReplaceAllUsesWith. Fixes PR14333.Rafael Espindola2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167912 91177308-0d34-0410-b5e6-96231b3b80d8
* Use TARGET2 relocation for TType references on ARM.Anton Korobeynikov2012-11-14
| | | | | | | | | Do some cleanup of the code while here. Inspired by patch by Logan Chien! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167904 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Use the 'count' attribute instead of the 'upper_bound' attribute."Eric Christopher2012-11-13
| | | | | | | | temporarily as it is breaking the gdb bots. This reverts commit r167806/e7ff4c14b157746b3e0228d2dce9f70712d1c126. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167886 91177308-0d34-0410-b5e6-96231b3b80d8
* [MC][COFF] Emit weak symbols to the correct section. Patch by Dmitry Puzirev!Michael J. Spencer2012-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167877 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r167836, "llvm/test/Other/close-stderr.ll: Mark it as XFAIL:mingw32 ↵NAKAMURA Takumi2012-11-13
| | | | | | for now.", corresponding to r167849. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167876 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test case to verify correct relocs being generated forUlrich Weigand2012-11-13
| | | | | | | TLS symbols on PowerPC using the integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167875 91177308-0d34-0410-b5e6-96231b3b80d8
* numerically sort the symbols, so that the testcase result is uniformShankar Easwaran2012-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167872 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-nm: Make sort more stable when symbol names are equal.Daniel Dunbar2012-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167866 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: when constructing VZEXT_LOAD from other loads, makes sure its outputManman Ren2012-11-13
| | | | | | | | | | | | chain is correctly setup. As an example, if the original load must happen before later stores, we need to make sure the constructed VZEXT_LOAD is constrained to be before the stores. rdar://12684358 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167859 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not consider a machine instruction that uses and defines the sameUlrich Weigand2012-11-13
| | | | | | | | | | | physical register as candidate for common subexpression elimination in MachineCSE. This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc caused by MachineCSE invalidly merging two separate DYNALLOC insns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167855 91177308-0d34-0410-b5e6-96231b3b80d8
* Adding changes to support GNU style archive library readingShankar Easwaran2012-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167853 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 167755/167760. We don't want to emit crash diagnostics on ↵Chad Rosier2012-11-13
| | | | | | command-line syntax errors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167849 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/Other/close-stderr.ll: Mark it as XFAIL:mingw32 for now.NAKAMURA Takumi2012-11-13
| | | | | | | | | | | On MSYS, 70 is not seen, but 1. r127726 should be reworked. Candidate options are; 1) Use not exit(70), but _exit(70), in report_fatal_error(). 2) Return with _exit(70) in ~raw_ostream(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167836 91177308-0d34-0410-b5e6-96231b3b80d8
* Codegen support for arbitrary vector getelementptrs.Duncan Sands2012-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167830 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the instcombine GEP index widening transform to work correctly for vectorDuncan Sands2012-11-13
| | | | | | | getelementptrs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167829 91177308-0d34-0410-b5e6-96231b3b80d8
* Relax the restrictions on vector of pointer types, and vector getelementptr.Duncan Sands2012-11-13
| | | | | | | | | | | | | | | | Previously in a vector of pointers, the pointer couldn't be any pointer type, it had to be a pointer to an integer or floating point type. This is a hassle for dragonegg because the GCC vectorizer happily produces vectors of pointers where the pointer is a pointer to a struct or whatever. Vector getelementptr was restricted to just one index, but now that vectors of pointers can have any pointer type it is more natural to allow arbitrary vector getelementptrs. There is however the issue of struct GEPs, where if each lane chose different struct fields then from that point on each lane will be working down into unrelated types. This seems like too much pain for too little gain, so when you have a vector struct index all the elements are required to be the same. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167828 91177308-0d34-0410-b5e6-96231b3b80d8
* DependenceAnalysis: Print all dependency pairs when dumping. Update all ↵Benjamin Kramer2012-11-13
| | | | | | | | testcases. Part of a patch by Preston Briggs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167827 91177308-0d34-0410-b5e6-96231b3b80d8
* Figure out <size> argument of llvm.lifetime intrinsics at the moment they ↵Alexey Samsonov2012-11-13
| | | | | | are created (during function inlining) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167821 91177308-0d34-0410-b5e6-96231b3b80d8
* instcombine: Migrate math library call simplificationsMeador Inge2012-11-13
| | | | | | | | | | | | | | | | | This patch migrates the math library call simplifications from the simplify-libcalls pass into the instcombine library call simplifier. I have typically migrated just one simplifier at a time, but the math simplifiers are interdependent because: 1. CosOpt, PowOpt, and Exp2Opt all depend on UnaryDoubleFPOpt. 2. CosOpt, PowOpt, Exp2Opt, and UnaryDoubleFPOpt all depend on the option -enable-double-float-shrink. These two factors made migrating each of these simplifiers individually more of a pain than it would be worth. So, I migrated them all together. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167815 91177308-0d34-0410-b5e6-96231b3b80d8
* BBVectorize: Don't vectorize vector-manipulation chainsHal Finkel2012-11-13
| | | | | | | | Don't choose a vectorization plan containing only shuffles and vector inserts/extracts. Due to inperfections in the cost model, these can lead to infinite recusion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167811 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the 'count' attribute instead of the 'upper_bound' attribute.Bill Wendling2012-11-13
| | | | | | | | | | If we have a type 'int a[1]' and a type 'int b[0]', the generated DWARF is the same for both of them because we use the 'upper_bound' attribute. Instead use the 'count' attrbute, which gives the correct number of elements in the array. <rdar://problem/12566646> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167806 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup the main RegisterCoalescer loop.Andrew Trick2012-11-13
| | | | | | Block priorities still apply outside loops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167793 91177308-0d34-0410-b5e6-96231b3b80d8
* revert r167740Shuxin Yang2012-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167787 91177308-0d34-0410-b5e6-96231b3b80d8
* BBVectorize: Only some insert element operand pairs are free.Hal Finkel2012-11-12
| | | | | | | | This fixes another infinite recursion case when using target costs. We can only replace insert element input chains that are pure (end with inserting into an undef). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167784 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix test case added in patch fixing PR14314Michael Liao2012-11-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167769 91177308-0d34-0410-b5e6-96231b3b80d8
* Update test case for r167754/r167755.Chad Rosier2012-11-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167760 91177308-0d34-0410-b5e6-96231b3b80d8
* BBVectorize: Use a more sophisticated check for input costHal Finkel2012-11-12
| | | | | | | | | The old checking code, which assumed that input shuffles and insert-elements could always be folded (and thus were free) is too simple. This can only happen in special circumstances. Using the simple check caused infinite recursion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167750 91177308-0d34-0410-b5e6-96231b3b80d8
* BBVectorize: Check the types of compare instructionsHal Finkel2012-11-12
| | | | | | | The pass would previously assert when trying to compute the cost of compare instructions with illegal vector types (like struct pointers). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167743 91177308-0d34-0410-b5e6-96231b3b80d8
* This change is to fix rdar://12571717 which is about assertion in ↵Shuxin Yang2012-11-12
| | | | | | | | | | | | | | | | | | | Reassociate pass. The assertion is trigged when the Reassociater tries to transform expression ... + 2 * n * 3 + 2 * m + ... into: ... + 2 * (n*3 + m). In the process of the transformation, a helper routine folds the constant 2*3 into 6, confusing optimizer which is trying the to eliminate the common factor 2, and cannot find 2 any more. Review is pending. But I'd like commit first in order to help those who are waiting for this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167740 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Infrastructure for weak DAG edges.Andrew Trick2012-11-12
| | | | | | | | This adds support for weak DAG edges to the general scheduling infrastructure in preparation for MachineScheduler support for heuristics based on weak edges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167738 91177308-0d34-0410-b5e6-96231b3b80d8
* BBVectorize: Check the input types of shuffles for legalityHal Finkel2012-11-12
| | | | | | | | | | This fixes a bug where shuffles were being fused such that the resulting input types were not legal on the target. This would occur only when both inputs and dependencies were also foldable operations (such as other shuffles) and there were other connected pairs in the same block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167731 91177308-0d34-0410-b5e6-96231b3b80d8
* Normalize memcmp constant folding results.Meador Inge2012-11-12
| | | | | | | | | | | | | | | | | | | The library call simplifier folds memcmp calls with all constant arguments to a constant. For example: memcmp("foo", "foo", 3) -> 0 memcmp("hel", "foo", 3) -> 1 memcmp("foo", "hel", 3) -> -1 The folding is implemented in terms of the system memcmp that LLVM gets linked with. It currently just blindly uses the value returned from the system memcmp as the folded constant. This patch normalizes the values returned from the system memcmp to (-1, 0, 1) so that we get consistent results across multiple platforms. The test cases were adjusted accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167726 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR14314Michael Liao2012-11-12
| | | | | | | | | - Fix operand order for atomic sub, where the minuend is the value loaded from memory and the subtrahend is the parameter specified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167718 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Add more precise PTX/SM target attributesJustin Holewinski2012-11-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each SM and PTX version is modeled as a subtarget feature/CPU. Additionally, PTX 3.1 is added as the default PTX version to be out-of-the-box compatible with CUDA 5.0. Available CPUs for this target: sm_10 - Select the sm_10 processor. sm_11 - Select the sm_11 processor. sm_12 - Select the sm_12 processor. sm_13 - Select the sm_13 processor. sm_20 - Select the sm_20 processor. sm_21 - Select the sm_21 processor. sm_30 - Select the sm_30 processor. sm_35 - Select the sm_35 processor. Available features for this target: ptx30 - Use PTX version 3.0. ptx31 - Use PTX version 3.1. sm_10 - Target SM 1.0. sm_11 - Target SM 1.1. sm_12 - Target SM 1.2. sm_13 - Target SM 1.3. sm_20 - Target SM 2.0. sm_21 - Target SM 2.1. sm_30 - Target SM 3.0. sm_35 - Target SM 3.5. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167699 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove hard-coded constant in Transforms/InstCombine/memcmp-1.llMeador Inge2012-11-11
| | | | | | | | | | | | | | | | | | | | | | | | | | Transforms/InstCombine/memcmp-1.ll has a test case that looks like: @foo = constant [4 x i8] c"foo\00" @hel = constant [4 x i8] c"hel\00" ... %mem1 = getelementptr [4 x i8]* @hel, i32 0, i32 0 %mem2 = getelementptr [4 x i8]* @foo, i32 0, i32 0 %ret = call i32 @memcmp(i8* %mem1, i8* %mem2, i32 3) ret i32 %ret ; CHECK: ret i32 2 The folded return value (2 above) is computed using the system memcmp that the compiler is linked with. This can return different values on different systems. The test was originally written on an OS X 10.7.5 x86-64 box and passed. However, it failed on one of the x86-64 FreeBSD buildbots because the system memcpy on that machine returned a different value (1 instead of 2). I fixed the test by checking the folding constants with regexes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167691 91177308-0d34-0410-b5e6-96231b3b80d8
* instcombine: Migrate memset optimizationsMeador Inge2012-11-11
| | | | | | | This patch migrates the memset optimizations from the simplify-libcalls pass into the instcombine library call simplifier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167689 91177308-0d34-0410-b5e6-96231b3b80d8
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