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* MC/Mach-O: Fix regression introduced in r126127, this assignment shouldn't haveDaniel Dunbar2011-03-17
| | | | | | been removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127812 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/h-registers-1.ll: Add explicit -mtriple=x86_64-linux. It ↵NAKAMURA Takumi2011-03-17
| | | | | | does not need to be checked on x86_64-win32 (aka Win64). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127800 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix handling of @IDNTPOFF relocations, they need to get STT_TLS.Joerg Sonnenberger2011-03-17
| | | | | | | While here, add VK_ARM_TPOFF and VK_ARM_GOTTPOFF, too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127780 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/constant-pool-remat-0.ll: FileCheck-ize and add explicit ↵NAKAMURA Takumi2011-03-16
| | | | | | -mtriple=x86_64-linux. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127775 91177308-0d34-0410-b5e6-96231b3b80d8
* The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byteCameron Zwarich2011-03-16
| | | | | | | | | | | rather than an int. Thankfully, this only causes LLVM to miss optimizations, not generate incorrect code. This just fixes the zext at the return. We still insert an i32 ZextAssert when reading a function's arguments, but it is followed by a truncate and another i8 ZextAssert so it is not optimized. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127766 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename a test to be more inclusive.Cameron Zwarich2011-03-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127765 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r127757, "Patch to a fix dwarf relocation problem on ARM. One-line fixDaniel Dunbar2011-03-16
| | | | | | | plus the test where it used to break.", which broke Clang self-host of a Debug+Asserts compiler, on OS X. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127763 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XCore intrinsics for setclk, setrdy.Richard Osborne2011-03-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127761 91177308-0d34-0410-b5e6-96231b3b80d8
* Patch to a fix dwarf relocation problem on ARM. One-line fix plus the test ↵Renato Golin2011-03-16
| | | | | | where it used to break. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127757 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a test for i1 zeroext arguments on x86-64. We currently generate code thatCameron Zwarich2011-03-16
| | | | | | | conforms to the ABI, but DAGCombine could in theory recognize the sequence of zext asserts and truncates and generate incorrect code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127754 91177308-0d34-0410-b5e6-96231b3b80d8
* Add checkevent intrinsic to check if any resources owned by the current threadRichard Osborne2011-03-16
| | | | | | | can event. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127741 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86: FileCheck-ize and add actions for x86_64-linux and ↵NAKAMURA Takumi2011-03-16
| | | | | | x86_64-win32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127734 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86: Add a pattern for Win64.NAKAMURA Takumi2011-03-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127733 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86: FileCheck-ize and add explicit -mtriple=x86_64-linux. They ↵NAKAMURA Takumi2011-03-16
| | | | | | are useless to Win64 target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127732 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/byval*.ll: Win64 has not supported byval yet.NAKAMURA Takumi2011-03-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127731 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/dyn-stackalloc.ll: FileCheck-ize.NAKAMURA Takumi2011-03-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127730 91177308-0d34-0410-b5e6-96231b3b80d8
* Only convert allocas to scalars if it is profitable. The profitability metric ICameron Zwarich2011-03-16
| | | | | | | | | | | chose is having a non-memcpy/memset use and being larger than any native integer type. Originally I chose having an access of a size smaller than the total size of the alloca, but this caused some minor issues on the spirit benchmark where SRoA runs again after some inlining. This fixes <rdar://problem/8613163>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127718 91177308-0d34-0410-b5e6-96231b3b80d8
* Add native integer type TargetData to some existing tests.Cameron Zwarich2011-03-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127717 91177308-0d34-0410-b5e6-96231b3b80d8
* There were two issues fixed:Johnny Chen2011-03-15
| | | | | | | | | | | | | | | | | 1. The ARM Darwin *r9 call instructions were pseudo-ized recently. Modify the ARMDisassemblerCore.cpp file to accomodate the change. 2. The disassembler was unnecessarily adding 8 to the sign-extended imm24: imm32 = SignExtend(imm24:'00', 32); // A8.6.23 BL, BLX (immediate) // Encoding A1 It has no business doing such. Removed the offending logic. Add test cases to arm-tests.txt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127707 91177308-0d34-0410-b5e6-96231b3b80d8
* Some minor cleanups based on feedback.Bill Wendling2011-03-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127694 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not form thumb2 ldrd / strd if the offset is by multiple of 4. rdar://9133587Evan Cheng2011-03-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127683 91177308-0d34-0410-b5e6-96231b3b80d8
* On the XCore the scavenging slot should be closest to the SP.Richard Osborne2011-03-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127680 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XCore intrinsics for getps, setps, setsr and clrsr.Richard Osborne2011-03-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127678 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Set PTX 2.0 as the minimum supported versionJustin Holewinski2011-03-15
| | | | | | | | - Remove PTX 1.4 code generation - Change type of intrinsics to .v4.i32 instead of .v4.i16 - Add and/or/xor integer instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127677 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not add PHIs with no users when creating LCSSA form. Patch by Andrew Clinton.Cameron Zwarich2011-03-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127674 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a peephole optimization to optimize pairs of bitcasts. e.g.Evan Cheng2011-03-15
| | | | | | | | | | | | | | | | | | | | | | | v2 = bitcast v1 ... v3 = bitcast v2 ... = v3 => v2 = bitcast v1 ... = v1 if v1 and v3 are of in the same register class. bitcast between i32 and fp (and others) are often not nops since they are in different register classes. These bitcast instructions are often left because they are in different basic blocks and cannot be eliminated by dag combine. rdar://9104514 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127668 91177308-0d34-0410-b5e6-96231b3b80d8
* PR9450: Make switch optimization in SimplifyCFG not dependent on the orderingEli Friedman2011-03-15
| | | | | | | | of pointers in an std::map. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127650 91177308-0d34-0410-b5e6-96231b3b80d8
* sext(undef) = 0, because the top bits will all be the same.Evan Cheng2011-03-15
| | | | | | | zext(undef) = 0, because the top bits will be zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127649 91177308-0d34-0410-b5e6-96231b3b80d8
* Testcase for r127630.Bill Wendling2011-03-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127648 91177308-0d34-0410-b5e6-96231b3b80d8
* Basic sanity checks to ensure that 2- and 3-byteSean Callanan2011-03-15
| | | | | | | | | VEX prefixes are working for triadic AVX instructions. This concludes the patch set to enable AVX support for the X86 disassebler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127647 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed an ARM disassembler bug where it does not handle STRi12 correctly ↵Johnny Chen2011-03-15
| | | | | | | | | | | because an extra register operand was erroneously added. Remove an incorrect assert which triggers the bug. rdar://problem/9131529 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127642 91177308-0d34-0410-b5e6-96231b3b80d8
* Propagate SCEV no-wrap flags whenever possible.Andrew Trick2011-03-15
| | | | | | | This needs review. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127638 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches.Jim Grosbach2011-03-15
| | | | | | | Also more cleanly separate the ARM vs. Thumb functionality. Previously, the encoding would be incorrect for some Thumb instructions (the indirect calls). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127637 91177308-0d34-0410-b5e6-96231b3b80d8
* If we don't know how long a string is we can't fold an _chk version to theEric Christopher2011-03-15
| | | | | | | | | normal version. Fixes rdar://9123638 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127636 91177308-0d34-0410-b5e6-96231b3b80d8
* Generate a VTBL instruction instead of a series of loads and stores when weBill Wendling2011-03-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | can. As Nate pointed out, VTBL isn't super performant, but it *has* to be better than this: _shuf: @ BB#0: @ %entry push {r4, r7, lr} add r7, sp, #4 sub sp, #12 mov r4, sp bic r4, r4, #7 mov sp, r4 mov r2, sp vmov d16, r0, r1 orr r0, r2, #6 orr r3, r2, #7 vst1.8 {d16[0]}, [r3] vst1.8 {d16[5]}, [r0] subs r4, r7, #4 orr r0, r2, #5 vst1.8 {d16[4]}, [r0] orr r0, r2, #4 vst1.8 {d16[4]}, [r0] orr r0, r2, #3 vst1.8 {d16[0]}, [r0] orr r0, r2, #2 vst1.8 {d16[2]}, [r0] orr r0, r2, #1 vst1.8 {d16[1]}, [r0] vst1.8 {d16[3]}, [r2] vldr.64 d16, [sp] vmov r0, r1, d16 mov sp, r4 pop {r4, r7, pc} The "illegal" testcase in vext.ll is no longer illegal. <rdar://problem/9078775> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127630 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix this test up a bit.Eric Christopher2011-03-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127621 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor optimization. sign-ext/anyext of undef is still undef.Evan Cheng2011-03-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127598 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Emit global arrays with proper sizesJustin Holewinski2011-03-14
| | | | | | | - Emit all arrays as type .b8 and proper sizes in bytes to conform to the output of nvcc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127584 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Add support for sqrt/sin/cos intrinsicsJustin Holewinski2011-03-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127578 91177308-0d34-0410-b5e6-96231b3b80d8
* ptx: add set.p instruction and related changes to predicate executionChe-Liang Chiou2011-03-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127577 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach ComputeMaskedBits about sub nsw.Benjamin Kramer2011-03-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127548 91177308-0d34-0410-b5e6-96231b3b80d8
* Saving files before committing is overrated.Eric Christopher2011-03-12
| | | | | | | Add a RUN line to this test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127520 91177308-0d34-0410-b5e6-96231b3b80d8
* Sometimes isPredicable lies to us and tells us we don't need the operands.Eric Christopher2011-03-12
| | | | | | | | | | Go ahead and add them on when we might want to use them and let later passes remove them. Fixes rdar://9118569 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127518 91177308-0d34-0410-b5e6-96231b3b80d8
* Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side-Jim Grosbach2011-03-11
| | | | | | | | effect that we get proper instruction printing using the "pop" mnemonic for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127502 91177308-0d34-0410-b5e6-96231b3b80d8
* Roll r127459 back in:Cameron Zwarich2011-03-11
| | | | | | | | | | | Optimize trivial branches in CodeGenPrepare, which often get created from the lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127498 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the GCC test suite issue exposed by r127477, which was caused by stackCameron Zwarich2011-03-11
| | | | | | | protector insertion not working correctly with unreachable code. Since that revision was rolled out, this test doesn't actual fail before this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127497 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often getDaniel Dunbar2011-03-11
| | | | | | created from the", it broke some GCC test suite tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127477 91177308-0d34-0410-b5e6-96231b3b80d8
* ComputeMaskedBits: sub falls through to add, and sub doesn't have the same ↵Benjamin Kramer2011-03-11
| | | | | | | | overflow semantics as add. Should fix the selfhost failures that started with r127463. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127465 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Fix a thinko where transform an icmp under the assumption that ↵Benjamin Kramer2011-03-11
| | | | | | | | it's a zero comparison when it's not. Fixes PR9454. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127464 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach ComputeMaskedBits about nsw on add. I don't think there's anything we canNick Lewycky2011-03-11
| | | | | | | | do with nuw here, but sub and mul should be given similar treatment. Fixes PR9343 #15! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127463 91177308-0d34-0410-b5e6-96231b3b80d8
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