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* GlobalOpt: Apply fastcc to internal x86_thiscallcc functionsReid Kleckner2014-02-26
| | | | | | | | | | We should apply fastcc whenever profitable. We can expand this list, but there are lots of conventions with performance implications that we don't want to change. Differential Revision: http://llvm-reviews.chandlerc.com/D2705 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202293 91177308-0d34-0410-b5e6-96231b3b80d8
* Relax COFF string table checkNico Rieck2014-02-26
| | | | | | | | | COFF object files with 0 as string table size are currently rejected. This prevents us from reading object files written by tools like cvtres that violate the PECOFF spec and write 0 instead of 4 for the size of an empty string table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202292 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix broken FileCheck prefixNico Rieck2014-02-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202291 91177308-0d34-0410-b5e6-96231b3b80d8
* Use count 0.Rafael Espindola2014-02-26
| | | | | | Thanks to Roman Divacky for the suggestion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202283 91177308-0d34-0410-b5e6-96231b3b80d8
* Compare DataLayout by Value, not by pointer.Rafael Espindola2014-02-26
| | | | | | | | This fixes spurious warnings in llvm-link about the datalayout not matching. Thanks to Zalman Stern for reporting the bug! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202276 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR18165: LSR must avoid scaling factors that exceed the limit on ↵Andrew Trick2014-02-26
| | | | | | | | truncated use. Patch by Michael Zolotukhin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202273 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-symbolizer: use dynamic symbol table if the regular one is stripped.Alexey Samsonov2014-02-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202265 91177308-0d34-0410-b5e6-96231b3b80d8
* Ensure bitcode encoding of instructions and their operands stays stable.Michael Kuperstein2014-02-26
| | | | | | | | This includes instructions with aggregate operands (insert/extract), instructions with vector operands (insert/extract/shuffle), binary arithmetic and bitwise instructions, conversion instructions and terminators. Work was done by lama.saba@intel.com. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202262 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: simplify tbl/tbx polymorphismTim Northover2014-02-26
| | | | | | | | | The table argument is always 128-bit (and interpreted as <16 x i8>) so the extra specifier for it is just clutter. No user-visible behaviour change, so no tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202258 91177308-0d34-0410-b5e6-96231b3b80d8
* ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) ↵Artyom Skrobov2014-02-26
| | | | | | wouldn't affect CPSR in an IT block git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202257 91177308-0d34-0410-b5e6-96231b3b80d8
* Stop test/CodeGen/ARM/a15.ll targetting non-ARM targets.Daniel Sanders2014-02-26
| | | | | | | | | | | | | | | | | Summary: Fixes an issue where a test attempts to use -mcpu=cortex-a15 on non-ARM targets. This triggers an assertion on MIPS since it doesn't know what ABI to use by default for unrecognized processors. Reviewers: rengolin Reviewed By: rengolin CC: llvm-commits, aemerson, rengolin Differential Revision: http://llvm-reviews.chandlerc.com/D2876 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202256 91177308-0d34-0410-b5e6-96231b3b80d8
* [SROA] Use the correct index integer size in GEPs through non-defaultChandler Carruth2014-02-26
| | | | | | | | | | | address spaces. This isn't really a correctness issue (the values are truncated) but its much cleaner. Patch by Matt Arsenault! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202252 91177308-0d34-0410-b5e6-96231b3b80d8
* [SROA] Teach SROA how to handle pointers from address spaces other thanChandler Carruth2014-02-26
| | | | | | | | | | | | | | | the default. Based on the patch by Matt Arsenault, D1764! I switched one place to use the more direct pointer type to compute the desired address space, and I reworked the memcpy rewriting section to reflect significant refactorings that this patch helped inspire. Thanks to several of the folks who helped review and improve the patch as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202247 91177308-0d34-0410-b5e6-96231b3b80d8
* [SROA] Split the alignment computation complete for the memcpy rewritingChandler Carruth2014-02-26
| | | | | | | | | | | | | to work independently for the slice side and the other side. This allows us to only compute the minimum of the two when we actually rewrite to a memcpy that needs to take the minimum, and preserve higher alignment for one side or the other when rewriting to loads and stores. This fix was inspired by seeing the result of some refactoring that makes addrspace handling better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202242 91177308-0d34-0410-b5e6-96231b3b80d8
* [SROA] Fix PR18615 with some long overdue simplifications to the boundsChandler Carruth2014-02-26
| | | | | | | | | | | | | | | | | | | | | | | | | checking in SROA. The primary change is to just rely on uge for checking that the offset is within the allocation size. This removes the explicit checks against isNegative which were terribly error prone (including the reversed logic that led to PR18615) and prevented us from supporting stack allocations larger than half the address space.... Ok, so maybe the latter isn't *common* but it's a silly restriction to have. Also, we used to try to support a PHI node which loaded from before the start of the allocation if any of the loaded bytes were within the allocation. This doesn't make any sense, we have never really supported loading or storing *before* the allocation starts. The simplified logic just doesn't care. We continue to allow loading past the end of the allocation in part to support cases where there is a PHI and some loads are larger than others and the larger ones reach past the end of the allocation. We could solve this a different and more conservative way, but I'm still somewhat paranoid about this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202224 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempt to unbreak an MSVC buildbot by switching to %llc_dwarf.Adrian Prantl2014-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202202 91177308-0d34-0410-b5e6-96231b3b80d8
* DwarfDebug: Avoid emitting an empty debug_aranges section when aranges are ↵David Blaikie2014-02-25
| | | | | | disabled git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202201 91177308-0d34-0410-b5e6-96231b3b80d8
* Address review comments for r202188.Adrian Prantl2014-02-25
| | | | | | | | | This is refactoring / simplifying code, updating comments and enabling the testcase on non-x86 platforms. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202199 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Custom select 64-bit ADDTom Stellard2014-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202194 91177308-0d34-0410-b5e6-96231b3b80d8
* Account for 128-bit integer operations in PPCCTRLoopsHal Finkel2014-02-25
| | | | | | | We need to abort the formation of counter-register-based loops where there are 128-bit integer operations that might become function calls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202192 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't try to set a dummy DataLayout. It is parsed now.Rafael Espindola2014-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202191 91177308-0d34-0410-b5e6-96231b3b80d8
* Store a DataLayout in Module.Rafael Espindola2014-02-25
| | | | | | | | | | | | | | Now that DataLayout is not a pass, store one in Module. Since the C API expects to be able to get a char* to the datalayout description, we have to keep a std::string somewhere. This patch keeps it in Module and also uses it to represent modules without a DataLayout. Once DataLayout is mandatory, we should probably move the string to DataLayout itself since it won't be necessary anymore to represent the special case of a module without a DataLayout. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202190 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug info: Support variadic functions.Adrian Prantl2014-02-25
| | | | | | | | | | | | | | Variadic functions have an unspecified parameter tag after the last argument. In IR this is represented as an unspecified parameter in the subroutine type. Paired commit with CFE r202185. rdar://problem/13690847 This re-applies r202184 + a bugfix in DwarfDebug's argument handling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202188 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Debug info: Support variadic functions."Adrian Prantl2014-02-25
| | | | | | This reverts commit r202184 because of buildbot breakage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202187 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug info: Support variadic functions.Adrian Prantl2014-02-25
| | | | | | | | | | | | Variadic functions have an unspecified parameter tag after the last argument. In IR this is represented as an unspecified parameter in the subroutine type. Paired commit with CFE. rdar://problem/13690847 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202184 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Add intrinsic for CLRPT (clear port time) instruction.Richard Osborne2014-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202172 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Add intrinsic for EDU (event disable unconditional) instruction.Richard Osborne2014-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202171 91177308-0d34-0410-b5e6-96231b3b80d8
* Keep the link register for uwtable.Logan Chien2014-02-25
| | | | | | | | | | | | The function with uwtable attribute might be visited by the stack unwinder, thus the link register should be considered as clobbered after the execution of the branch and link instruction (i.e. the definition of the machine instruction can't be ignored) even when the callee function are marked with noreturn. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202165 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Prefer to word align functions.Richard Osborne2014-02-25
| | | | | | | | | | | | | | | | | | | The behaviour of the XCore's instruction buffer means that the performance of the same code sequence can differ depending on whether it starts at a 4 byte aligned address or not. Since we don't model the instruction buffer in the backend we have no way of knowing for sure if it is beneficial to word align a specific function. However, in the absence of precise modelling, it is better on balance to word align functions because: * It makes a fetch-nop while executing the prologue slightly less likely. * If we don't word align functions then a small perturbation in one function can have a dramatic knock on effect. If the size of the function changes it might change the alignment and therefore the performance of all the functions that happen to follow it in the binary. This butterfly effect makes it harder to reason about and measure the performance of code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202163 91177308-0d34-0410-b5e6-96231b3b80d8
* Ignore old JIT tests in AARch64 - CMake styleRenato Golin2014-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202126 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typosAlp Toker2014-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202107 91177308-0d34-0410-b5e6-96231b3b80d8
* [SROA] Fix another instability in SROA with respect to the sliceChandler Carruth2014-02-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ordering. The fundamental problem that we're hitting here is that the use-def chain ordering is *itself* not a stable thing to be relying on in the rewriting for SROA. Further, we use a non-stable sort over the slices to arrange them based on the section of the alloca they're operating on. With a debugging STL implementation (or different implementations in stage2 and stage3) this can cause stage2 != stage3. The specific aspect of this problem fixed in this commit deals with the rewriting and load-speculation around PHIs and Selects. This, like many other aspects of the use-rewriting in SROA, is really part of the "strong SSA-formation" that is doen by SROA where it works very hard to canonicalize loads and stores in *just* the right way to satisfy the needs of mem2reg[1]. When we have a select (or a PHI) with 2 uses of the same alloca, we test that loads downstream of the select are speculatable around it twice. If only one of the operands to the select needs to be rewritten, then if we get lucky we rewrite that one first and the select is immediately speculatable. This can cause the order of operand visitation, and thus the order of slices to be rewritten, to change an alloca from promotable to non-promotable and vice versa. The fix is to defer all of the speculation until *after* the rewrite phase is done. Once we've rewritten everything, we can accurately test for whether speculation will work (once, instead of twice!) and the order ceases to matter. This also happens to simplify the other subtlety of speculation -- we need to *not* speculate anything unless the result of speculating will make the alloca fully promotable by mem2reg. I had a previous attempt at simplifying this, but it was still pretty horrible. There is actually already a *really* nice test case for this in basictest.ll, but on multiple STL implementations and inputs, we just got "lucky". Fortunately, the test case is very small and we can essentially build it in exactly the opposite way to get reasonable coverage in both directions even from normal STL implementations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202092 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-dwarfdump: Support for debug_line.dwo section for file names for type ↵David Blaikie2014-02-24
| | | | | | units under fission. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202091 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-objdump: Do not attempt to disassemble symbols outside of sectionSimon Atanasyan2014-02-24
| | | | | | | | | | | | | | boundaries. It is possible to create an ELF executable where symbol from say .text section 'points' to the address outside the section boundaries. It does not have a sense to disassemble something outside the section. Without this fix llvm-objdump prints finite or infinite (depends on the executable file architecture) number of 'invalid instruction encoding' warnings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202083 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI - Add new CI arithmetic instructions.Matt Arsenault2014-02-24
| | | | | | | Does not yet include larger part required to match v_mad_i64_i32 / v_mad_u64_u32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202077 91177308-0d34-0410-b5e6-96231b3b80d8
* SLPVectorizer: Try vectorizing 'splat' storesArnold Schwaighofer2014-02-24
| | | | | | | | | Vectorize sequential stores of a broadcasted value. 5% on eon. radar://16124699 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202067 91177308-0d34-0410-b5e6-96231b3b80d8
* For lcov tests, don't Xfail mips littl endian (mipsel-... and mip64el-...)Reed Kotler2014-02-24
| | | | | | | | targets. Just big endian (mips-... and mips64-...) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202049 91177308-0d34-0410-b5e6-96231b3b80d8
* [CMake] Remove dependency on non-existing profile_rt-shared. Patch by Brad King.Alexey Samsonov2014-02-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202041 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] remove test that should have been removed in r202033Kostya Serebryany2014-02-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202034 91177308-0d34-0410-b5e6-96231b3b80d8
* Asm Parser: support .error directiveSaleem Abdulrasool2014-02-23
| | | | | | | | The .error directive is similar to .err in that it will halt assembly if it is evaluated for assembly. However, it permits a user supplied message to be rendered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201999 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmParser: support .ifeqs directiveSaleem Abdulrasool2014-02-23
| | | | | | | The .ifeqs directive assembles the following code if the quoted string parameters are equal. The strings must be quoted using double quotes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201998 91177308-0d34-0410-b5e6-96231b3b80d8
* SPARC: Implement TRAP lowering. Matches what GCC emits.Benjamin Kramer2014-02-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201994 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .align without parametersSaleem Abdulrasool2014-02-23
| | | | | | | | .align is handled specially on certain targets. .align without any parameters on ARM indicates a default alignment (4). Handle the special case in the target parser, but fall back to the generic parser for the normal version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201988 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: support .ifneSaleem Abdulrasool2014-02-23
| | | | | | | The .ifne directive assembles the following section of code if the argument expression is non-zero. Effectively, it is equivalent to if. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201986 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: handle space properly for .ifc/.ifncSaleem Abdulrasool2014-02-23
| | | | | | | | If the strings are not quoted, the first string stops at the first comma, and the second string stops at the end of the line. Strings which contain whitespace should be quoted. Unquoted space is to be discarded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201985 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: add support for .err directiveSaleem Abdulrasool2014-02-23
| | | | | | | The .err directive produces an error whenever it is assembled. This can be useful for preventing assembly when an unexpected condition occurs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201984 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: Fixed encoding of VPTESTMQElena Demikhovsky2014-02-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201980 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .short and .hwordSaleem Abdulrasool2014-02-23
| | | | | | | | This adds support for the .short and its alias .hword for adding literal values into the object file. This is similar to the .word directive, however, rather than inserting a value of 4 bytes, adds a 2-byte value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201968 91177308-0d34-0410-b5e6-96231b3b80d8
* Make test more resilient against scheduling decisions.Benjamin Kramer2014-02-22
| | | | | | Should bring the atom buildbots back to life. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201951 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Support COFF string tables larger than 10MBNico Rieck2014-02-22
| | | | | | | | Offsets past the range of single-slash encoding are encoded as base64, padded to 6 characters, and prefixed with two slashes. This encoding is undocumented but used by MSVC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201940 91177308-0d34-0410-b5e6-96231b3b80d8
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