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* X86: Add patterns for MULHU/MULHS of v8i16 and v16i16.Benjamin Kramer2014-04-26
| | | | | | | This gets us pretty code for divs of i16 vectors. Turn the existing intrinsics into the corresponding nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207317 91177308-0d34-0410-b5e6-96231b3b80d8
* DAGCombiner: Turn divs of vector splats into vectorized multiplications.Benjamin Kramer2014-04-26
| | | | | | | | | | | | Otherwise the legalizer would just scalarize everything. Support for mulhi in the targets isn't that great yet so on most targets we get exactly the same scalarized output. Add a test for x86 vector udiv. I had to disable the mulhi nodes on ARM because there aren't any patterns for it. As far as I know ARM has instructions for getting the high part of a multiply so this should be fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207315 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r206749 till a final decision about the intrinsics is made.Michael Zolotukhin2014-04-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207313 91177308-0d34-0410-b5e6-96231b3b80d8
* RecursivelyDeleteTriviallyDeadInstructions() could removeGerolf Hoflehner2014-04-26
| | | | | | | | | | | | | more than 1 instruction. The caller need to be aware of this and adjust instruction iterators accordingly. rdar://16679376 Repaired r207302. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207309 91177308-0d34-0410-b5e6-96231b3b80d8
* [DAG] During DAG legalization keep opaque constants even after expanding.Juergen Ributzka2014-04-26
| | | | | | | | | | | | | | | | | | | | | The included test case would return the incorrect results, because the expansion of an shift with a constant shift amount of 0 would generate undefined behavior. This is because ExpandShiftByConstant assumes that all shifts by constants with a value of 0 have already been optimized away. This doesn't happen for opaque constants and usually this isn't a problem, because opaque constants won't take this code path - they are not supposed to. In the case that the opaque constant has to be expanded by the legalizer, the legalizer would drop the opaque flag. In this case we hit the limitations of ExpandShiftByConstant and create incorrect code. This commit fixes the legalizer by not dropping the opaque flag when expanding opaque constants and adding an assertion to ExpandShiftByConstant to catch this not supported case in the future. This fixes <rdar://problem/16718472> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207304 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert commit r207302 since build failuresGerolf Hoflehner2014-04-26
| | | | | | | have been reported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207303 91177308-0d34-0410-b5e6-96231b3b80d8
* RecursivelyDeleteTriviallyDeadInstructions() could removeGerolf Hoflehner2014-04-26
| | | | | | | | | | | more than 1 instruction. The caller need to be aware of this and adjust instruction iterators accordingly. rdar://16679376 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207302 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Implement TargetLowering::getScalingFactorCost hook.Quentin Colombet2014-04-26
| | | | | | | | | | Scaling factors are not free on X86 because every "complex" addressing mode breaks the related instruction into 2 allocations instead of 1. <rdar://problem/16730541> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207301 91177308-0d34-0410-b5e6-96231b3b80d8
* [InstCombine][X86] Teach how to fold calls to SSE2/AVX2 packed logical shiftAndrea Di Biagio2014-04-26
| | | | | | | | | | | | right intrinsics. A packed logical shift right with a shift count bigger than or equal to the element size always produces a zero vector. In all other cases, it can be safely replaced by a 'lshr' instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207299 91177308-0d34-0410-b5e6-96231b3b80d8
* Appease the almighty buildbots.Filipe Cabecinhas2014-04-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207295 91177308-0d34-0410-b5e6-96231b3b80d8
* Optimization for certain shufflevector by using insertps.Filipe Cabecinhas2014-04-25
| | | | | | | | | | | | | | | | | | | | Summary: If we're doing a v4f32/v4i32 shuffle on x86 with SSE4.1, we can lower certain shufflevectors to an insertps instruction: When most of the shufflevector result's elements come from one vector (and keep their index), and one element comes from another vector or a memory operand. Added tests for insertps optimizations on shufflevector. Added support and tests for v4i32 vector optimization. Reviewers: nadav Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D3475 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207291 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "blockfreq: Approximate irreducible control flow"Duncan P. N. Exon Smith2014-04-25
| | | | | | | | | | | | This reverts commit r207286. It causes an ICE on the cmake-llvm-x86_64-linux buildbot [1]: llvm/lib/Analysis/BlockFrequencyInfo.cpp: In lambda function: llvm/lib/Analysis/BlockFrequencyInfo.cpp:182:1: internal compiler error: in get_expr_operands, at tree-ssa-operands.c:1035 [1]: http://bb.pgr.jp/builders/cmake-llvm-x86_64-linux/builds/12093/steps/build_llvm/logs/stdio git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207287 91177308-0d34-0410-b5e6-96231b3b80d8
* blockfreq: Approximate irreducible control flowDuncan P. N. Exon Smith2014-04-25
| | | | | | | | | | | | | | | | | | | | | | Previously, irreducible backedges were ignored. With this commit, irreducible SCCs are discovered on the fly, and modelled as loops with multiple headers. This approximation specifies the headers of irreducible sub-SCCs as its entry blocks and all nodes that are targets of a backedge within it (excluding backedges within true sub-loops). Block frequency calculations act as if we insert a new block that intercepts all the edges to the headers. All backedges and entries to the irreducible SCC point to this imaginary block. This imaginary block has an edge (with even probability) to each header block. The result is now reasonable enough that I've added a number of testcases for irreducible control flow. I've outlined in `BlockFrequencyInfoImpl.h` ways to improve the approximation. <rdar://problem/14292693> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207286 91177308-0d34-0410-b5e6-96231b3b80d8
* Unbreak the gdb buildbot by not lowering dbg.declare intrinsics for arrays.Adrian Prantl2014-04-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207284 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure that rangelists are also relative to the compile unitEric Christopher2014-04-25
| | | | | | | | low_pc similar to location lists. Fixes PR19563 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207283 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an -mattr option to the gold plugin to support subtarget features in LTOTom Roeder2014-04-25
| | | | | | | | | | | | This adds support for an -mattr option to the gold plugin and to llvm-lto. This allows the caller to specify details of the subtarget architecture, like +aes, or +ssse3 on x86. Note that this requires a change to the include/llvm-c/lto.h interface: it adds a function lto_codegen_set_attr and it increments the version of the interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207279 91177308-0d34-0410-b5e6-96231b3b80d8
* [LoopStrengthReduce] Don't trim formula that uses a subset of required registersAdam Nemet2014-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Consider this use from the new testcase: LSR Use: Kind=ICmpZero, Offsets={0}, widest fixup type: i32 reg({1000,+,-1}<nw><%for.body>) -3003 + reg({3,+,3}<nw><%for.body>) -1001 + reg({1,+,1}<nuw><nsw><%for.body>) -1000 + reg({0,+,1}<nw><%for.body>) -3000 + reg({0,+,3}<nuw><%for.body>) reg({-1000,+,1}<nw><%for.body>) reg({-3000,+,3}<nsw><%for.body>) This is the last use we consider for a solution in SolveRecurse, so CurRegs is a large set. (CurRegs is the set of registers that are needed by the previously visited uses in the in-progress solution.) ReqRegs is { {3,+,3}<nw><%for.body>, {1,+,1}<nuw><nsw><%for.body> } This is the intersection of the regs used by any of the formulas for the current use and CurRegs. Now, the code requires a formula to contain *all* these regs (the comment is simply wrong), otherwise the formula is immediately disqualified. Obviously, no formula for this use contains two regs so they will all get disqualified. The fix modifies the check to allow the formula in this case. The idea is that neither of these formulae is introducing any new registers which is the point of this early pruning as far as I understand. In terms of set arithmetic, we now allow formulas whose used regs are a subset of the required regs not just the other way around. There are few more loops in the test-suite that are now successfully LSRed. I have benchmarked those and found very minimal change. Fixes <rdar://problem/13965777> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207271 91177308-0d34-0410-b5e6-96231b3b80d8
* This reapplies r207235 with an additional bugfixes caught by the msanAdrian Prantl2014-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | buildbot - do not insert debug intrinsics before phi nodes. Debug info for optimized code: Support variables that are on the stack and described by DBG_VALUEs during their lifetime. Previously, when a variable was at a FrameIndex for any part of its lifetime, this would shadow all other DBG_VALUEs and only a single fbreg location would be emitted, which in fact is only valid for a small range and not the entire lexical scope of the variable. The included dbg-value-const-byref testcase demonstrates this. This patch fixes this by Local - emitting dbg.value intrinsics for allocas that are passed by reference - dropping all dbg.declares (they are now fully lowered to dbg.values) SelectionDAG - renamed constructors for SDDbgValue for better readability. - fix UserValue::match() to handle indirect values correctly - not inserting an MMI table entries for dbg.values that describe allocas. - lowering dbg.values that describe allocas into *indirect* DBG_VALUEs. CodeGenPrepare - leaving dbg.values for an alloca were they are (see comment) Other - regenerated/updated instcombine.ll testcase and included source rdar://problem/16679879 http://reviews.llvm.org/D3374 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207269 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "This reapplies r207130 with an additional testcase+and a missing ↵Adrian Prantl2014-04-25
| | | | | | | | check for" This reverts commit 207235 to investigate msan buildbot breakage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207250 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: remove @llvm.arm.sevlSaleem Abdulrasool2014-04-25
| | | | | | | | This intrinsic is no longer needed with the new @llvm.arm.hint(i32) intrinsic which provides a generic, extensible manner for adding hint instructions. This functionality can now be represented as @llvm.arm.hint(i32 5). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207246 91177308-0d34-0410-b5e6-96231b3b80d8
* [inline cold threshold] Command line argument for inline threshold willManman Ren2014-04-25
| | | | | | | | | | | | override the default cold threshold. When we use command line argument to set the inline threshold, the default cold threshold will not be used. This is in line with how we use OptSizeThreshold. When we want a higher threshold for all functions, we do not have to set both inline threshold and cold threshold. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207245 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: provide a new generic hint intrinsicSaleem Abdulrasool2014-04-25
| | | | | | | | | Introduce the llvm.arm.hint(i32) intrinsic that can be used to inject hints into the instruction stream. This is particularly useful for generating IR from a compiler where the user may inject an intrinsic (e.g. __yield). These are then pattern substituted into the correct instruction which already existed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207242 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r207135 without modifications.Adrian Prantl2014-04-25
| | | | | | | | | | Debug info: Let dbg.values inserted by LowerDbgDeclare inherit the location of the dbg.value. This gets rid of tons of redundant variable DIEs in subscopes. rdar://problem/14874886, rdar://problem/16679936 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207236 91177308-0d34-0410-b5e6-96231b3b80d8
* This reapplies r207130 with an additional testcase+and a missing check forAdrian Prantl2014-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AllocaInst that was missing in one location. Debug info for optimized code: Support variables that are on the stack and described by DBG_VALUEs during their lifetime. Previously, when a variable was at a FrameIndex for any part of its lifetime, this would shadow all other DBG_VALUEs and only a single fbreg location would be emitted, which in fact is only valid for a small range and not the entire lexical scope of the variable. The included dbg-value-const-byref testcase demonstrates this. This patch fixes this by Local - emitting dbg.value intrinsics for allocas that are passed by reference - dropping all dbg.declares (they are now fully lowered to dbg.values) SelectionDAG - renamed constructors for SDDbgValue for better readability. - fix UserValue::match() to handle indirect values correctly - not inserting an MMI table entries for dbg.values that describe allocas. - lowering dbg.values that describe allocas into *indirect* DBG_VALUEs. CodeGenPrepare - leaving dbg.values for an alloca were they are (see comment) Other - regenerated/updated instcombine.ll testcase and included source rdar://problem/16679879 http://reviews.llvm.org/D3374 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207235 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM64] When compiling for ELF in PIC mode, local symbols shouldn't go ↵Tilmann Scheller2014-04-25
| | | | | | | | | | | | through the GOT There's no need for local symbols to go through the GOT, in fact it seems GNU ld is not even emitting GOT entries for local symbols and will error out when trying to resolve a GOT relocation for a local symbol. This bug triggers when bootstrapping clang on AArch64 Linux with -fPIC and the ARM64 backend. The AArch64 backend is not affected. With this commit it's now possible to bootstrap clang on AArch64 Linux with the ARM64 backend (-fPIC, -O3). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207226 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM64] Handle fp128 for parameter passing on stackJiangning Liu2014-04-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207222 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: fix assertion in ISelDAGToDAGTim Northover2014-04-25
| | | | | | | | Also an unused variable, so double bonus! This should deal with PR19548. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207221 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM64] Print preferred aliases for SFBM/UBFM in InstPrinterBradley Smith2014-04-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207219 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM64] Add RUN lines for "–target arm64 –mattr=-fp-armv8" on AArch64 ↵Kevin Qin2014-04-25
| | | | | | | | | | no-fp test. This patch is a supplement of implementing predicate of FP, enabling aarch64 backend no-fp tests on arm64 target for verification. During this, one bug is exposed and fixed by this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207215 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM64] Support crc predicate on ARM64.Kevin Qin2014-04-25
| | | | | | | According to the specification, CRC is an optional extension of the architecture. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207214 91177308-0d34-0410-b5e6-96231b3b80d8
* blockfreq: Only one mass distribution per nodeDuncan P. N. Exon Smith2014-04-25
| | | | | | | | | | Remove the concepts of "forward" and "general" mass distributions, which was wrong. The split might have made sense in an early version of the algorithm, but it's definitely wrong now. <rdar://problem/14292693> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207195 91177308-0d34-0410-b5e6-96231b3b80d8
* blockfreq: Use better branch weights in multiexit testDuncan P. N. Exon Smith2014-04-25
| | | | | | | | The branch weights were even before. Make them different. <rdar://problem/14292693> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207193 91177308-0d34-0410-b5e6-96231b3b80d8
* blockfreq: Clean up irreducible testcasesDuncan P. N. Exon Smith2014-04-25
| | | | | | | | | | | Strip irreducible testcases to pure control flow. The function calls made the branch weights more believable but cluttered it up a lot. There isn't going to be any constant analysis here, so just use dumb branch logic to clarify the important parts. <rdar://problem/14292693> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207192 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow vectorization of bit intrinsics in BB Vectorizer.Karthik Bhat2014-04-25
| | | | | | | | This patch adds support for vectorization of bit intrinsics such as bswap,ctpop,ctlz,cttz. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207174 91177308-0d34-0410-b5e6-96231b3b80d8
* ProfileData: Treat missing function counts as malformedJustin Bogner2014-04-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207172 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "This reapplies r207130 with an additional testcase+and a missing ↵Adrian Prantl2014-04-25
| | | | | | | | check for" Typo in testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207166 91177308-0d34-0410-b5e6-96231b3b80d8
* This reapplies r207130 with an additional testcase+and a missing check forAdrian Prantl2014-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AllocaInst that was missing in one location. Debug info for optimized code: Support variables that are on the stack and described by DBG_VALUEs during their lifetime. Previously, when a variable was at a FrameIndex for any part of its lifetime, this would shadow all other DBG_VALUEs and only a single fbreg location would be emitted, which in fact is only valid for a small range and not the entire lexical scope of the variable. The included dbg-value-const-byref testcase demonstrates this. This patch fixes this by Local - emitting dbg.value intrinsics for allocas that are passed by reference - dropping all dbg.declares (they are now fully lowered to dbg.values) SelectionDAG - renamed constructors for SDDbgValue for better readability. - fix UserValue::match() to handle indirect values correctly - not inserting an MMI table entries for dbg.values that describe allocas. - lowering dbg.values that describe allocas into *indirect* DBG_VALUEs. CodeGenPrepare - leaving dbg.values for an alloca were they are (see comment) Other - regenerated/updated instcombine.ll testcase and included source rdar://problem/16679879 http://reviews.llvm.org/D3374 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207165 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Debug info for optimized code: Support variables that are on the ↵Adrian Prantl2014-04-25
| | | | | | | | stack and" This reverts commit 207130 for buildbot breakage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207162 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Debug info: Let dbg.values inserted by LowerDbgDeclare inherit the ↵Adrian Prantl2014-04-24
| | | | | | | | location" This reverts commit 207130 for buildbot breakage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207159 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Don't transform shifts into ands when the sign bit is tested.Benjamin Kramer2014-04-24
| | | | | | Should unbreak MultiSource/Benchmarks/mediabench/g721/g721encode/encode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207145 91177308-0d34-0410-b5e6-96231b3b80d8
* Add 'musttail' marker to call instructionsReid Kleckner2014-04-24
| | | | | | | | | | | | This is similar to the 'tail' marker, except that it guarantees that tail call optimization will occur. It also comes with convervative IR verification rules that ensure that tail call optimization is possible. Reviewers: nicholas Differential Revision: http://llvm-reviews.chandlerc.com/D3240 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207143 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix rdtsc.ll test to match r8 on win64Reid Kleckner2014-04-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207142 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug info: Let dbg.values inserted by LowerDbgDeclare inherit the locationAdrian Prantl2014-04-24
| | | | | | | | | of the dbg.value. This gets rid of tons of redundant variable DIEs in subscopes. rdar://problem/14874886, rdar://problem/16679936 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207135 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug info for optimized code: Support variables that are on the stack andAdrian Prantl2014-04-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | described by DBG_VALUEs during their lifetime. Previously, when a variable was at a FrameIndex for any part of its lifetime, this would shadow all other DBG_VALUEs and only a single fbreg location would be emitted, which in fact is only valid for a small range and not the entire lexical scope of the variable. The included dbg-value-const-byref testcase demonstrates this. This patch fixes this by Local - emitting dbg.value intrinsics for allocas that are passed by reference - dropping all dbg.declares (they are now fully lowered to dbg.values) SelectionDAG - renamed constructors for SDDbgValue for better readability. - fix UserValue::match() to handle indirect values correctly - not inserting an MMI table entries for dbg.values that describe allocas. - lowering dbg.values that describe allocas into *indirect* DBG_VALUEs. CodeGenPrepare - leaving dbg.values for an alloca were they are (see comment) Other - regenerated/updated instcombine-intrinsics testcase and included source rdar://problem/16679879 http://reviews.llvm.org/D3374 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207130 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Add support for Read Time Stamp Counter x86 builtin intrinsics.Andrea Di Biagio2014-04-24
| | | | | | | | | | | | | | | | This patch: - Adds two new X86 builtin intrinsics ('int_x86_rdtsc' and 'int_x86_rdtscp') as GCCBuiltin intrinsics; - Teaches the backend how to lower the two new builtins; - Introduces a common function to lower READCYCLECOUNTER dag nodes and the two new rdtsc/rdtscp intrinsics; - Improves (and extends) the existing x86 test 'rdtsc.ll'; now test 'rdtsc.ll' correctly verifies that both READCYCLECOUNTER and the two new intrinsics work fine for both 64bit and 32bit Subtargets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207127 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: add ARM64 runs to more MC tests.Tim Northover2014-04-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207120 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: run AArch64 NEON MC tests through ARM64 too.Tim Northover2014-04-24
| | | | | | | | This skips a couple of compare ones due to the different syntaxt for floating-point 0.0. AArch64 does it more canonically, and we'll need to fiddle ARM64 to make it work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207119 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: print NEON lists with a space.Tim Northover2014-04-24
| | | | | | | This matches ARM64 behaviour, which I think is clearer. It also puts all the churn from that difference into one easily ignored commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207116 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: enable remaining MC elf tests.Tim Northover2014-04-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207112 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: allow negative addends, at least on ELF.Tim Northover2014-04-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207111 91177308-0d34-0410-b5e6-96231b3b80d8
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