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* Debug Info: In DIBuilder, the context field of a forward decl is updatedManman Ren2013-10-09
* Fix a bug in Dead Argument Elimination.Shuxin Yang2013-10-09
* [Sparc] Disable tail call optimization for sparc64.Venkatraman Govindaraju2013-10-09
* AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics.Elena Demikhovsky2013-10-09
* AArch64: enable MISched by default.Tim Northover2013-10-09
* AArch64: migrate ADRP relaxation test to be llvm-mc only.Tim Northover2013-10-09
* Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. Thi...Craig Topper2013-10-09
* llvm/test/LTO should run also on cygwin.NAKAMURA Takumi2013-10-09
* Debug Info: In DIBuilder, the context field of a DICompositeType is updatedManman Ren2013-10-09
* Debug Info: In DIBuilder, the context fields of a static member and aManman Ren2013-10-08
* Debug Info: In DIBuilder, the derived-from field of DICompositeTypeManman Ren2013-10-08
* Debug Info: In DIBuilder, the derived-from field of DIDerivedTypeManman Ren2013-10-08
* [AArch64] Add support for NEON scalar floating-point reciprocal estimate,Chad Rosier2013-10-08
* [AArch64] Add support for NEON scalar signed/unsigned integer to floating-pointChad Rosier2013-10-08
* Debug Info: update testing to reflect r192018.Manman Ren2013-10-08
* Add fabsf to the list of inlined functions; otherwiseReed Kotler2013-10-08
* Add some xfaild R600 tests.Matt Arsenault2013-10-08
* Let rotr and bswap be handled by expansion for Mips16 since we don'tReed Kotler2013-10-08
* Fix a typo in the mattr part of the run line.Craig Topper2013-10-08
* Explicitly disable AVX on a bunch of tests so they won't fail on AVX machines...Craig Topper2013-10-08
* Remove some instructions that existed to provide aliases to the assembler. Ca...Craig Topper2013-10-08
* typo.Adrian Prantl2013-10-08
* typo.Adrian Prantl2013-10-08
* Reduce testcase from 1r92011.Adrian Prantl2013-10-08
* [mips] Test case for r192124.Akira Hatanaka2013-10-07
* LoopVectorize: External uses must use the last value in a reduction cycleArnold Schwaighofer2013-10-07
* Add Mips16 patterns for sign extend byte and sign extend halfword.Reed Kotler2013-10-07
* Struct byval: use the correct alignment for loads generated to loadManman Ren2013-10-07
* X86: Fix type check. Just because an integer type is illegal doesn't mean it'...Benjamin Kramer2013-10-07
* Revert r191834 until we measure the effect of this benchmarks and maybe find ...Alexey Samsonov2013-10-07
* Change objectsize intrinsic to accept different address spaces.Matt Arsenault2013-10-07
* [ARM] Improve build attributes emission.Amara Emerson2013-10-07
* [AArch64] Add support for NEON scalar arithmetic instructions:Chad Rosier2013-10-07
* [ARMv8] Add some disassembly tests for Thumb sevl/sevl.wJoey Gouly2013-10-07
* ARM: allow cortex-m0 to use hint instructionsTim Northover2013-10-07
* [Mips] Teach llvm-readobj to print MIPS-specific ELF program headers.Simon Atanasyan2013-10-07
* Remove some instructions that seem to only exist to trick the filtering check...Craig Topper2013-10-07
* Teach X86 asm parser that VMOVAPSrr and other VEX-encoded register to registe...Craig Topper2013-10-07
* Add disassembler support for long encodings for INC/DEC in 32-bit mode.Craig Topper2013-10-07
* Add support for aliases with linkonce_odr.Rafael Espindola2013-10-06
* Force a CPU that doesn't have AVX, otherwise this test fails.Benjamin Kramer2013-10-06
* X86: Don't fold spills into SSE operations if the stack is unaligned.Benjamin Kramer2013-10-06
* AVX-512: added scalar convert instructions and intrinsics.Elena Demikhovsky2013-10-06
* [Sparc] Do not emit nop after fcmp* instruction with V9.Venkatraman Govindaraju2013-10-06
* AVX-512: fixed shuffle loweringElena Demikhovsky2013-10-06
* [Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.Venkatraman Govindaraju2013-10-06
* [Sparc] Use addxcc/subxcc for adde/sube instead of addx/subx.Venkatraman Govindaraju2013-10-06
* Emit a better error when running out of registers on inline asm.Benjamin Kramer2013-10-05
* Remove unneeded TBM intrinsics. The arithmetic/logical operation patterns are...Craig Topper2013-10-05
* Add an additional pattern for BLCI since opt can turn (not (add x, 1)) into (...Craig Topper2013-10-05
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