summaryrefslogtreecommitdiff
path: root/test
Commit message (Collapse)AuthorAge
* [mips] Use multiple FileCheck prefixes rather than run the test multiple timesDaniel Sanders2014-02-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201695 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Remove spurious checks from a testcase.Venkatraman Govindaraju2014-02-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201690 91177308-0d34-0410-b5e6-96231b3b80d8
* This reverts commit r201625 and r201624.Rafael Espindola2014-02-19
| | | | | | | Since r201608 got reverted, it is not safe to use private linkage in these cases until it is committed back. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201688 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add explicit N32 and N64 tests to nabi-regs.s testDaniel Sanders2014-02-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201684 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix AVX512 vector sqrt assembly strings.Cameron McInally2014-02-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201681 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r201622 and r201608.Daniel Jasper2014-02-19
| | | | | | | This causes the LLVMgold plugin to segfault. More information on the replies to r201608. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201669 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: move test requiring X86TargetLowering info into its own directoryTim Northover2014-02-19
| | | | | | | | If LLVM is built without X86 as a supported target then the test would mysteriously fail. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201668 91177308-0d34-0410-b5e6-96231b3b80d8
* Try addding datalayout in case that's what Hexagon doesn't like.Tim Northover2014-02-19
| | | | | | | Just a wild stab in the dark really, but in the absence of any ability to reproduce the problem... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201658 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 CodeGenPrep: sink shufflevectors before shiftsTim Northover2014-02-19
| | | | | | | | | | | | | | | | | On x86, shifting a vector by a scalar is significantly cheaper than shifting a vector by another fully general vector. Unfortunately, because SelectionDAG operates on just one basic block at a time, the shufflevector instruction that reveals whether the right-hand side of a shift *is* really a scalar is often not visible to CodeGen when it's needed. This adds another handler to CodeGenPrepare, to sink any useful shufflevector instructions down to the basic block where they're used, predicated on a target hook (since on other architectures, doing so will often just introduce extra real work). rdar://problem/16063505 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201655 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove special FP opcode maps and instead add enough MRM_XX formats to ↵Craig Topper2014-02-19
| | | | | | handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201649 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of ↵Craig Topper2014-02-19
| | | | | | 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201641 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-objdump/COFF: Print load configuration table.Rui Ueyama2014-02-19
| | | | | | | | | | | | Load Configuration Table may contain a pointer to SEH table. This patch is to print the offset to the table. Printing SEH table contents is a TODO. The layout of Layout Configuration Table is described in Microsoft PE/COFF Object File Format Spec, but the table's offset/size descriptions seems to be totally wrong, at least in revision 8.3 of the spec. I believe the table in this patch is the correct one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201638 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: support required parametersSaleem Abdulrasool2014-02-19
| | | | | | | | | | | This enhances the macro parser to parse and handle parameter qualifications, which is needed to support required formal parameters in macro definitions. A required parameter may not be defaulted (though providing a default value is accepted with a warning). This improves GAS compatibility. Partially addresses PR9248. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201630 91177308-0d34-0410-b5e6-96231b3b80d8
* Now that llvm always does the right thing with private, use it.Rafael Espindola2014-02-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201625 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid an infinite cycle with private linkage and -f{data|function}-sections.Rafael Espindola2014-02-19
| | | | | | | | | | When outputting an object we check its section to find its name, but when looking for the section with -ffunction-section we look for the symbol name. Break the loop by requesting a name with the private prefix when constructing the section name. This matches the behavior before r201608. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201622 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR18743.Rafael Espindola2014-02-18
| | | | | | | | | | | | | | | | | | | | | | | | The IR @foo = private constant i32 42 is valid, but before this patch we would produce an invalid MachO from it. It was invalid because it would use an L label in a section where the liker needs the labels in order to atomize it. One way of fixing it would be to just reject this IR in the backend, but that would not be very front end friendly. What this patch does is use an 'l' prefix in sections that we know the linker requires symbols for atomizing them. This allows frontends to just use private and not worry about which sections they go to or how the linker handles them. One small issue with this strategy is that now a symbol name depends on the section, which is not available before codegen. This is not a problem in practice. The reason is that it only happens with private linkage, which will be ignored by the non codegen users (llvm-nm and llvm-ar). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201608 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Expanded sin, cos, pow with FP vector types inputsAna Pazos2014-02-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201601 91177308-0d34-0410-b5e6-96231b3b80d8
* XCore target: Handle common linkageRobert Lytton2014-02-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201563 91177308-0d34-0410-b5e6-96231b3b80d8
* XCore target: Fix llvm.eh.return and EH info register handlingRobert Lytton2014-02-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201561 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: use vpsllvd (& friends) for 16-bit shifts on HaswellTim Northover2014-02-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201558 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-cov: Support gcov's extermely lenient treatment of -oJustin Bogner2014-02-18
| | | | | | | | | | | | In gcov, the -o flag can accept either a directory or a file name. When given a directory, the gcda and gcno files are expected to be in that directory. When given a file, the gcda and gcno files are expected to be named based on the stem of that file. Non-existent paths are treated as files. This implements compatible behaviour. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201555 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a typo about lowering AArch64 va_copy.Jiangning Liu2014-02-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201541 91177308-0d34-0410-b5e6-96231b3b80d8
* PGO: llvm-profdata: tool for merging profilesDuncan P. N. Exon Smith2014-02-17
| | | | | | | | | | | | | | | | | | | Introducing llvm-profdata, a tool for merging profile data generated by PGO instrumentation in clang. - The name indicates a file extension of <name>.profdata. Eventually profile data output by clang should be changed to that extension. - llvm-profdata merges two profiles. However, the name is more general, since it will likely pick up more tasks (such as summarizing a single profile). - llvm-profdata parses the current text-based format, but will be updated once we settle on a binary format. <rdar://problem/15949645> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201535 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the arm assembler so that this malformed instruction:Kevin Enderby2014-02-17
| | | | | | | | | | | | | | | | | | | ldrd r6, r7 [r2, #15] simply gives an error and does not triggers an assertion. As Jim points out, the diagnostic is really strange here, but fixing that would be more complicated. The missing comma results in the parser expecting a construct like r2[2], which is the vector index thing the error message is talking about. That's not what the user intended, though, and there's nothing else in the instruction that looks at all like a vector. Yet more fallout from not having a real parser here and trying to do context-free generic matching for addressing modes. rdar://15097243 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201531 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for assigning to . in AsmParser.Anders Waldenborg2014-02-17
| | | | | | | | | | | This is implemented by handling assignments to the '.' pseudo symbol as ".org" directives. Differential Revision: http://llvm-reviews.chandlerc.com/D2625 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201530 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix diassembler handling of rex.b when mod=00/01/10 and bbb=101. Mod=00 ↵Craig Topper2014-02-17
| | | | | | should ignore the base register entirely. Mod=01/10 should treat this as R13 plus displacment. Fixes PR18860. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201507 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: implemented zext fron i1 to i16Elena Demikhovsky2014-02-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201502 91177308-0d34-0410-b5e6-96231b3b80d8
* fix for null VectorizedValue assertion in the SLP Vectorizer (in function ↵Gerolf Hoflehner2014-02-17
| | | | | | vectorizeTree()). radar://16064178 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201501 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: add some mixed argument testsSaleem Abdulrasool2014-02-17
| | | | | | | Add some tests to explicitly validate handling of comma and non-comma separated arguments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201500 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: better handling for named argumentsSaleem Abdulrasool2014-02-17
| | | | | | | | | | | | | | | | | | | Until this point only macro definition with named parameters were parsed but the names were ignored. This adds support for using that information for named parameter instantiation. In order to support the full semantics of the keyword arguments, the arguments are no longer lazily initialised since the keyword arguments can be specified out of order and partially if they are defaulted. Prepopulate the arguments with the default value for any defaulted parameters, and then parse the specified arguments. This simplies some of the handling of the arguments in the inner loop since empty arguments simply increment the parameter index and move on. Note that keyword and positional arguments cannot be mixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201499 91177308-0d34-0410-b5e6-96231b3b80d8
* Use 16 byte stack alignment for NaCl on ARMMark Seaborn2014-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NaCl's ARM ABI uses 16 byte stack alignment, so set that in ARMSubtarget.cpp. Using 16 byte alignment exposes an issue in code generation in which a varargs function leaves a 4 byte gap between the values of r1-r3 saved to the stack and the following arguments that were passed on the stack. (Previously, this code only needed to support 4 byte and 8 byte alignment.) With this issue, llc generated: varargs_func: sub sp, sp, #16 push {lr} sub sp, sp, #12 add r0, sp, #16 // Should be 20 stm r0, {r1, r2, r3} ldr r0, .LCPI0_0 // Address of va_list add r1, sp, #16 str r1, [r0] bl external_func Fix the bug by checking for "Align > 4". Also simplify the code by using OffsetToAlignment(), and update comments. Differential Revision: http://llvm-reviews.chandlerc.com/D2677 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201497 91177308-0d34-0410-b5e6-96231b3b80d8
* SCEVExpander: Try hard not to create derived induction variables in other loopsArnold Schwaighofer2014-02-16
| | | | | | | | | | | | | | | | | | | During LSR of one loop we can run into a situation where we have to expand the start of a recurrence of a loop induction variable in this loop. This start value is a value derived of the induction variable of a preceeding loop. SCEV has cannonicalized this value to a different recurrence than the recurrence of the preceeding loop's induction variable (the type and/or step direction) has changed). When we come to instantiate this SCEV we created a second induction variable in this preceeding loop. This patch tries to base such derived induction variables of the preceeding loop's induction variable. This helps twolf on arm and seems to help scimark2 on x86. Reapply with a fix for the case of a value derived from a pointer. radar://15970709 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201496 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix more broken CHECK linesNico Rieck2014-02-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201493 91177308-0d34-0410-b5e6-96231b3b80d8
* Add extra CHECK prefix to tests with explicit prefixNico Rieck2014-02-16
| | | | | | | These tests mistakenly assume that CHECK is still available even if an explicit prefix is specified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201492 91177308-0d34-0410-b5e6-96231b3b80d8
* Actually call FileCheck in testsNico Rieck2014-02-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201491 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: simpyfied BUILD_VECTOR for masks; fixed cmp/test sequenceElena Demikhovsky2014-02-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201487 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a DIELoc class to cover the DW_FORM_exprloc set of expressionsEric Christopher2014-02-16
| | | | | | | | | | | | | alongside DIEBlock and replace uses accordingly. Use DW_FORM_exprloc in DWARF4 and later code. Update testcases. Adding a DIELoc instead of using extra forms inside DIEBlock so that we can keep location expressions separate from other uses. No direct use at the moment, however, it's not a lot of code and using a separately named class keeps it somewhat more obvious what's going on in various locations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201481 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix broken CHECK linesNico Rieck2014-02-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201479 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: relax declaration parsingSaleem Abdulrasool2014-02-16
| | | | | | | | The Linux kernel defines empty macros for compatibility with ARM UAL syntax. The comma after the name is optional, and if present can be safely lexed. This improves compatibility with the GNU assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201474 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: (partially) support .arch_extension directiveSaleem Abdulrasool2014-02-16
| | | | | | | | | | | | This adds a partial implementation of the .arch_extension directive to the integrated ARM assembler. There are a number of limitations to this implementation arising from the target backend support rather than the implementation itself. Namely, iWMMXT (v1 and v2), Maverick, and XScale support is not present in the ARM backend. Currently, there is no check for A-class only (needed for virt), and no ARMv6k detection (needed for os and sec). The remainder of the extensions are fully supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201471 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Deduplicate entries in the fission address tableDavid Blaikie2014-02-15
| | | | | | | | | | | | This broke in r185459 while TLS support was being generalized to handle non-symbol TLS representations. I thought about/tried having an enum rather than a bool to track the TLS-ness of the address table entry, but namespaces and naming seemed more hassle than it was worth for only one caller that needed to specify this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201469 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "SCEVExpander: Try hard not to create derived induction variables in ↵Arnold Schwaighofer2014-02-15
| | | | | | | | other loops" This reverts commit r201465. It broke an arm bot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201466 91177308-0d34-0410-b5e6-96231b3b80d8
* SCEVExpander: Try hard not to create derived induction variables in other loopsArnold Schwaighofer2014-02-15
| | | | | | | | | | | | | | | | | During LSR of one loop we can run into a situation where we have to expand the start of a recurrence of a loop induction variable in this loop. This start value is a value derived of the induction variable of a preceeding loop. SCEV has cannonicalized this value to a different recurrence than the recurrence of the preceeding loop's induction variable (the type and/or step direction) has changed). When we come to instantiate this SCEV we created a second induction variable in this preceeding loop. This patch tries to base such derived induction variables of the preceeding loop's induction variable. This helps twolf on arm and seems to help scimark2 on x86. radar://15970709 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201465 91177308-0d34-0410-b5e6-96231b3b80d8
* Add opcode extension forms of MOV8ri/MOV16ri/MOV32ri.Craig Topper2014-02-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201463 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Implement DW_AT_stmt_list for type unitsDavid Blaikie2014-02-14
| | | | | | | | | Type units will share the statement list of their defining compile unit. This is a tradeoff that reduces .o debug info size at the cost of some linked debug info size (since the contents of those string tables won't be deduplicated along with the type unit) which seems right for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201445 91177308-0d34-0410-b5e6-96231b3b80d8
* [CodeGenPrepare][AddressingModeMatcher] Give up on type promotion if theQuentin Colombet2014-02-14
| | | | | | | | transformation does not bring any immediate benefits and introduce an illegal operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201439 91177308-0d34-0410-b5e6-96231b3b80d8
* TargetLowering: n * r where n > 2 should be an illegal addressing modeTom Stellard2014-02-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201433 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Don't include the name of the CU file in the line table file list ↵David Blaikie2014-02-14
| | | | | | | | | | | | | | | | | | | | when it's unneeded Recommitting r201380 (reverted in r201389) Recommitting r201351 and r201355 (reverted in r201351 and r201355) We weren't emitting the an empty (header only) line table when the line table was empty - this made the DWARF invalid (the compile unit would point to the zero-size debug_lines section where there should've been an empty line table but there was nothing at all). Fix that, and as a consequence this works around/addresses PR18809. Also, we emit a non-empty line table to workaround a darwin linker bug, so XFAILing on darwin too. Also, mark the test as 'REQUIRES: object-emission' because it does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201429 91177308-0d34-0410-b5e6-96231b3b80d8
* Support DWARF discriminators in object streamer.Diego Novillo2014-02-14
| | | | | | | | | | | | | | | Summary: This adds support for emitting DWARF path discriminator values in the object streamer. It also changes the DWARF dumper to show discriminator values in the line table output. Reviewers: echristo CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2794 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201427 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch has two main functions:Reed Kotler2014-02-14
| | | | | | | | | | | | | | | | | | | 1) Fix a specific bug when certain conversion functions are called in a program compiled as mips16 with hard float and the program is linked as c++. There are two libraries that are reversed in the link order with gcc/g++ and clang/clang++ for mips16 in this case and the proper stubs will then not be called. These stubs are normally handled in the Mips16HardFloat pass but in this case we don't know at that time that we need to generate the stubs. This must all be handled later in code generation and we have moved this functionality to MipsAsmPrinter. When linked as C (gcc or clang) the proper stubs are linked in from libc. 2) Set up the infrastructure to handle 90% of what is in the Mips16HardFloat pass in this new area of MipsAsmPrinter. This is a more logical place to handle this and we have known for some time that we needed to move the code later and not implement it using inline asm as we do now but it was not clear exactly where to do this and what mechanism should be used. Now it's clear to us how to do this and this patch contains the infrastructure to move most of this to MipsAsmPrinter but the actual moving will be done in a follow on patch. The same infrastructure is used to fix this current bug as described in #1. This change was requested by the list during the original putback of the Mips16HardFloat pass but was not practical for us do at that time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201426 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-21 02:11:30 +0000