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* [yaml2obj][ELF] ELF Relocations Support.Simon Atanasyan2014-04-11
* Move the segmented stack switch to a function attributeReid Kleckner2014-04-10
* [stack protector] Refactor and clean-up test. No functionality change.Josh Magee2014-04-10
* Remove the use of "%e" as it is not a valid expansion like "%t".Kaelyn Takata2014-04-10
* Reimplement debug info compression by compressing the whole section, rather t...David Blaikie2014-04-10
* Revert debug info compression support.David Blaikie2014-04-10
* For the ARM integrated assembler add checking of theKevin Enderby2014-04-10
* Reapply "SLPVectorizer: Ignore users that are insertelements we can reschedul...Arnold Schwaighofer2014-04-10
* [mips] Switch the MIPS-III and MIPS-IV assembler tests to use -mcpu=mips4.Daniel Sanders2014-04-10
* YAMLIO: Allow scalars to dictate quotation rulesDavid Majnemer2014-04-10
* [ARM64] Fix immediate cost calculation for types larger than i64.Juergen Ributzka2014-04-10
* Revert "For the ARM integrated assembler add checking of the alignments on vl...Reid Kleckner2014-04-10
* X86: Tighten up test.Jim Grosbach2014-04-10
* Add support for load folding of avx1 logical instructionsJim Grosbach2014-04-09
* SelectionDAG: Don't constant fold target-specific nodes.Jim Grosbach2014-04-09
* For the ARM integrated assembler add checking of theKevin Enderby2014-04-09
* [AArch64] Implement the isZExtFree APIs.Chad Rosier2014-04-09
* [AArch64] Implement the isTruncateFree API.Chad Rosier2014-04-09
* [DAGCombiner] DAG combine does not know how to combine indexed loads withQuentin Colombet2014-04-09
* Revert "Revert "YAMLIO: Encode ambiguous hex strings explicitly""David Majnemer2014-04-09
* obj2yaml: Don't crash if the characteristics field is zeroDavid Majnemer2014-04-09
* [NVPTX] Add preliminary intrinsics and codegen support for textures/surfacesJustin Holewinski2014-04-09
* [NVPTX] Add support for addrspacecast in global variable initializers, includ...Justin Holewinski2014-04-09
* Fix some doc and comment typosAlp Toker2014-04-09
* [ARM64] Change SYS without a register to an alias to make disassembling more ...Bradley Smith2014-04-09
* [ARM64] Correctly disassemble ISB operand as ISB not DBarrier.Bradley Smith2014-04-09
* [ARM64] Properly support both apple and standard syntax for FMOVBradley Smith2014-04-09
* [ARM64] Flag setting logical/add/sub immediate instructions don't use SP.Bradley Smith2014-04-09
* [ARM64] Conditional branches must always print their condition code, even AL.Bradley Smith2014-04-09
* [ARM64] Fix disassembly logic for extended loads/stores with 32-bit registers.Bradley Smith2014-04-09
* [ARM64] Add missing shifted register MVN alias to ORNBradley Smith2014-04-09
* [ARM64] SXTW/UXTW are only valid aliases for 32-bit operations.Bradley Smith2014-04-09
* [ARM64] Fix canonicalisation of MOVs. MOV is too complex to be modelled by a ...Bradley Smith2014-04-09
* [ARM64] Fixup ADR/ADRP parsing such that they accept immediates and all label...Bradley Smith2014-04-09
* [ARM64] Ensure sp is decoded as SP, not XZR in LD1 instructions.Bradley Smith2014-04-09
* [ARM64] Tighten up the special casing in emitting arithmetic extends. UXTW sh...Bradley Smith2014-04-09
* [ARM64] Rename LR to the UAL-compliant 'X30'.Bradley Smith2014-04-09
* [ARM64] Rename FP to the UAL-compliant 'X29'.Bradley Smith2014-04-09
* [ARM64] Add a PostEncoderMethod to FCMP - the Rm field should canonically be ...Bradley Smith2014-04-09
* [ARM64] SCVTF and FCVTZS/U are undefined if scale<5> == 0.Bradley Smith2014-04-09
* [ARM64] EXT and EXTR instructions on v8i8 and W regs respectively must have t...Bradley Smith2014-04-09
* [ARM64] UBFM/BFM is undefined on w registers when imms<5> or immr<5> is 1.Bradley Smith2014-04-09
* [ARM64] Floating point to fixed point scaled conversions are only available o...Bradley Smith2014-04-09
* [ARM64] Port over the PostEncoderMethod fix for SMULH/UMULH from AArch64.Bradley Smith2014-04-09
* [ARM64] Add missing tlbi operands and error for extra/missing register on tlb...Bradley Smith2014-04-09
* [ARM64] Rework system register parsing to overcome SPSel clash in MSR variants.Bradley Smith2014-04-09
* [ARM64] Port over the PostEncoderMethod from AArch64 for exclusive loads and ...Bradley Smith2014-04-09
* [ARM64] Add WZR to isGPR32Register, since every use needs to check for this a...Bradley Smith2014-04-09
* [ARM64] Move CPSRField and DBarrier operands over to AArch64-style disassembl...Bradley Smith2014-04-09
* [ARM64] Switch the decoder, disassembler, instprinter and asmparser over to u...Bradley Smith2014-04-09
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