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path: root/utils/TableGen/AsmMatcherEmitter.cpp
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* Prefer diagnostics from target predicate in asm matcher.Jim Grosbach2011-08-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137742 91177308-0d34-0410-b5e6-96231b3b80d8
* MCTargetAsmParser target match predicate support.Jim Grosbach2011-08-15
| | | | | | | | | | Allow a target assembly parser to do context sensitive constraint checking on a potential instruction match. This will be used, for example, to handle Thumb2 IT block parsing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137675 91177308-0d34-0410-b5e6-96231b3b80d8
* Move MatchResultTy enum into base class definition.Jim Grosbach2011-08-15
| | | | | | | | No need for it to be redefined as part of every derived target asm parser class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137649 91177308-0d34-0410-b5e6-96231b3b80d8
* Unconstify InitsDavid Greene2011-07-29
| | | | | | | | Remove const qualifiers from Init references, per Chris' request. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136531 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX] Constify InitsDavid Greene2011-07-29
| | | | | | | Make references to Inits const everywhere. This is the final step before making them unique. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136485 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to ↵Evan Cheng2011-07-26
| | | | | | MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136027 91177308-0d34-0410-b5e6-96231b3b80d8
* Have tblgen produce code that tolerates operands that return an invalid ↵Kevin Enderby2011-07-15
| | | | | | match class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135287 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r134921, 134917, 134908 and 134907. They're causing failuresEric Christopher2011-07-11
| | | | | | | in multiple buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134936 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX] Make Inits FoldableDavid Greene2011-07-11
| | | | | | | | | | | | | | | | | | Manage Inits in a FoldingSet. This provides several benefits: - Memory for Inits is properly managed - Duplicate Inits are folded into Flyweights, saving memory - It enforces const-correctness, protecting against certain classes of bugs The above benefits allow Inits to be used in more contexts, which in turn provides more dynamism to TableGen. This enhanced capability will be used by the AVX code generator to a fold common patterns together. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134907 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix dangling pointer.Eli Friedman2011-07-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134725 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a dangling reference. Patch by Dave Abrahams. pr10311Evan Cheng2011-07-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134709 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-08
| | | | | | | | | | | - Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for alternative register names, useful for instructions whose ↵Owen Anderson2011-06-27
| | | | | | | | | operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. Patch by Jim Grosbach. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133940 91177308-0d34-0410-b5e6-96231b3b80d8
* Consolidate some TableGen diagnostic helper functions.Jim Grosbach2011-06-21
| | | | | | | | | TableGen had diagnostic printers sprinkled about in a few places. Pull them together into a single location in Error.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133568 91177308-0d34-0410-b5e6-96231b3b80d8
* Store CodeGenRegisters as pointers so they won't be reallocated.Jakob Stoklund Olesen2011-06-18
| | | | | | | Reuse the CodeGenRegBank DenseMap in a few places that would build their own or use linear search. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133333 91177308-0d34-0410-b5e6-96231b3b80d8
* Give CodeGenRegisterClass a real sorted member set.Jakob Stoklund Olesen2011-06-15
| | | | | | | | | | | Make the Elements vector private and expose an ArrayRef through getOrder() instead. getOrder will eventually provide multiple user-specified allocation orders. Use the sorted member set for member and subclass tests. Clean up a lot of ad hoc searches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133040 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up. Add missing newline to generated file.Jim Grosbach2011-05-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130779 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-15
| | | | | | | | Luis Felipe Strano Moraes! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
* tlbgen/MC: StringRef's to temporary objects considered harmful.Daniel Dunbar2011-04-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128735 91177308-0d34-0410-b5e6-96231b3b80d8
* Check that MnemonicAlias doesn't map back to the same string.Joerg Sonnenberger2011-02-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125792 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmMatcher custom operand parser failure enhancements.Jim Grosbach2011-02-12
| | | | | | | | | | | | | Teach the AsmMatcher handling to distinguish between an error custom-parsing an operand and a failure to match. The former should propogate the error upwards, while the latter should continue attempting to parse with alternative matchers. Update the ARM asm parser accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125426 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy out asm matcher .inc output.Jim Grosbach2011-02-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125408 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't return before calling the post-processing function(s).Bill Wendling2011-02-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125256 91177308-0d34-0410-b5e6-96231b3b80d8
* Do AsmMatcher operand classification per-opcode.Jim Grosbach2011-02-10
| | | | | | | | | | | | When matching operands for a candidate opcode match in the auto-generated AsmMatcher, check each operand against the expected operand match class. Previously, operands were classified independently of the opcode being handled, which led to difficulties when operand match classes were more complicated than simple subclass relationships. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125245 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement support for custom target specific asm parsing of operands.Bruno Cardoso Lopes2011-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Motivation: Improve the parsing of not usual (different from registers or immediates) operand forms. This commit implements only the generic support. The ARM specific modifications will come next. A table like the one below is autogenerated for every instruction containing a 'ParserMethod' in its AsmOperandClass static const OperandMatchEntry OperandMatchTable[20] = { /* Mnemonic, Operand List Mask, Operand Class, Features */ { "cdp", 29 /* 0, 2, 3, 4 */, MCK_Coproc, Feature_IsThumb|Feature_HasV6 }, { "cdp", 58 /* 1, 3, 4, 5 */, MCK_Coproc, Feature_IsARM }, A matcher function very similar (but lot more naive) to MatchInstructionImpl scans the table. After the mnemonic match, the features are checked and if the "to be parsed" operand index is present in the mask, there's a real match. Then, a switch like the one below dispatch the parsing to the custom method provided in 'ParseMethod': case MCK_Coproc: return TryParseCoprocessorOperandName(Operands); git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125030 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmMatcher: Sink ConvertToMCInst into the TargetAsmParser instance, whichDaniel Dunbar2011-02-04
| | | | | | implicitly allows custom conversions to be member functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124908 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmParser: Add support for allowing the conversion process to fail (viaDaniel Dunbar2011-02-04
| | | | | | custom conversion functions). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124872 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmMatcher: Add support for custom conversion functions.Daniel Dunbar2011-02-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124870 91177308-0d34-0410-b5e6-96231b3b80d8
* Changed the TableGen created MatchInstructionImpl() setting of ErrorInfo.Kevin Enderby2011-02-02
| | | | | | | | | | | | The algorithm for identifying which operand is invalid will now always point to some operand and not the mnemonic sometimes. The change is now that ErrorInfo is the index of the highest operand that does not match for any of the matching mnemonics records. And no longer the ~0U value when the mnemonic matches and not every record with a matching mnemonic has the same mismatching operand index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124734 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a MnemonicIsValid method to the asm matcher.Bob Wilson2011-01-26
| | | | | | Patch by Bill Wendling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124328 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix spelling of CouldMatchAmbiguouslyWith method name.Bob Wilson2011-01-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124324 91177308-0d34-0410-b5e6-96231b3b80d8
* Whitespace and 80-column fixes.Bob Wilson2011-01-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124323 91177308-0d34-0410-b5e6-96231b3b80d8
* Improve the AsmMatcher's ability to handle suboperands.Bob Wilson2011-01-26
| | | | | | | | | | | | | | | When an operand class is defined with MIOperandInfo set to a list of suboperands, the AsmMatcher has so far required that operand to also define a custom ParserMatchClass, and InstAlias patterns have not been able to set the individual suboperands separately. This patch removes both of those restrictions. If a "compound" operand does not override the default ParserMatchClass, then the AsmMatcher will now parse its suboperands separately. If an InstAlias operand has the same class as the corresponding compound operand, then it will be handled as before; but if that check fails, TableGen will now try to match up a sequence of InstAlias operands with the corresponding suboperands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124314 91177308-0d34-0410-b5e6-96231b3b80d8
* tblgen/AsmMatcherEmitter: Fix alias handling to honor -match-prefix.Daniel Dunbar2011-01-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124154 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM uses '.' in their tokens. Give it a name instead of a numeric value.Bill Wendling2011-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124026 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy comment.Bob Wilson2011-01-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123933 91177308-0d34-0410-b5e6-96231b3b80d8
* Precompute InstAlias operand mapping to result instruction operand indices.Bob Wilson2011-01-20
| | | | | | | There should be no functional change from this, but I think it's simpler this way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123931 91177308-0d34-0410-b5e6-96231b3b80d8
* When matching asm operands, always try to match the most restricted type first.Owen Anderson2011-01-18
| | | | | | | | | | | | | Unfortunately, while this is the "right" thing to do, it breaks some ARM asm parsing tests because MemMode5 and ThumbMemModeReg are ambiguous. This is tricky to resolve since neither is a subset of the other. XFAIL the test for now. The old way was broken in other ways, just ways we didn't happen to be testing, and our ARM asm parsing is going to require significant revisiting at a later point anyways. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123786 91177308-0d34-0410-b5e6-96231b3b80d8
* Formatting tweak.Daniel Dunbar2011-01-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123718 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some tablegen issues to allow using zero_reg for InstAlias definitions.Bob Wilson2011-01-14
| | | | | | | | This is needed to allow an InstAlias for an instruction with an "OptionalDef" result register (like ARM's cc_out) where you want to set the optional register to reg0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123490 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmMatcher: Fix indirect 80-col viola.Daniel Dunbar2011-01-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123174 91177308-0d34-0410-b5e6-96231b3b80d8
* various cleanups to tblgen, patch by Garrison Venn!Chris Lattner2010-12-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121837 91177308-0d34-0410-b5e6-96231b3b80d8
* eliminate the Records global variable, patch by Garrison Venn!Chris Lattner2010-12-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121659 91177308-0d34-0410-b5e6-96231b3b80d8
* Give the exclamation point a name instead of a number.Bill Wendling2010-11-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119759 91177308-0d34-0410-b5e6-96231b3b80d8
* pass literals like $$1 through to the asm matcher. This isn't right yet, ↵Chris Lattner2010-11-06
| | | | | | but doesn't hurt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118359 91177308-0d34-0410-b5e6-96231b3b80d8
* add (and document) the ability for alias results to haveChris Lattner2010-11-06
| | | | | | | | | fixed physical registers. Start moving fp comparison aliases to the .td file (which default to using %st1 if nothing is specified). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118352 91177308-0d34-0410-b5e6-96231b3b80d8
* generalize alias support to allow the result of an alias toChris Lattner2010-11-06
| | | | | | | | add fixed immediate values. Move the aad and aam aliases to use this, and document it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118350 91177308-0d34-0410-b5e6-96231b3b80d8
* fix a bug where we had an implicit assumption that theChris Lattner2010-11-06
| | | | | | | | | result instruction operand numbering matched the result pattern. Fixing this allows us to move the xchg/test aliases to the .td file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118334 91177308-0d34-0410-b5e6-96231b3b80d8
* fix some bugs in the alias support, unblocking changing of "clr" aliasesChris Lattner2010-11-06
| | | | | | | from c++ hacks to proper .td InstAlias definitions. Change them! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118330 91177308-0d34-0410-b5e6-96231b3b80d8
* Reimplement BuildResultOperands to be in terms of the result instruction'sChris Lattner2010-11-06
| | | | | | | | | | | | | | | | | | | operand list instead of the operand list redundantly declared on the alias or instruction. With this change, we finally remove the ins/outs list on the alias. Before: def : InstAlias<(outs GR16:$dst), (ins GR8 :$src), "movsx $src, $dst", (MOVSX16rr8W GR16:$dst, GR8:$src)>; After: def : InstAlias<"movsx $src, $dst", (MOVSX16rr8W GR16:$dst, GR8:$src)>; This also makes the alias mechanism more general and powerful, which will be exploited in subsequent patches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118329 91177308-0d34-0410-b5e6-96231b3b80d8
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