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path: root/utils/TableGen/AsmWriterEmitter.cpp
Commit message (Collapse)AuthorAge
* instructions can be in different namespaces. Make sure to use the rightChris Lattner2006-05-01
| | | | | | | one for each instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28038 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for modifier strings in machine instr descriptions. This allowsChris Lattner2006-02-06
| | | | | | | | | | us to avoid creating lots of "Operand" types with different printers, instead we can fold several together and use modifiers. For example, we can now use: ${target:call} to say that the operand should be printed like a 'call' operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26024 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify the variant handling code, no functionality change.Chris Lattner2006-02-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26023 91177308-0d34-0410-b5e6-96231b3b80d8
* add a note, ya knoeChris Lattner2006-02-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25880 91177308-0d34-0410-b5e6-96231b3b80d8
* Use printInlineAsm to, well, print inline asm's.Chris Lattner2006-01-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25677 91177308-0d34-0410-b5e6-96231b3b80d8
* No longer track value types for asm printer operands, and remove them asNate Begeman2005-11-30
| | | | | | | | an argument to every operand printing function. Requires some slight tweaks to x86, the only user. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate all remaining tabs and trailing spaces.Jeff Cohen2005-07-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR595: These error messages should not be looking at CGI.Name, theyChris Lattner2005-07-15
| | | | | | | should be looking at CGI.TheDef->getName(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22445 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for a TODO; instructions in .td files can now have argumentsNate Begeman2005-07-14
| | | | | | | | | printed as part of the opcode. This allows something like cmp${cc}ss in the x86 backed to be printed as cmpltss, cmpless, etc. depending on what the value of $cc is. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22439 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove trailing whitespaceMisha Brukman2005-04-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21428 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor fix.Chris Lattner2005-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19761 91177308-0d34-0410-b5e6-96231b3b80d8
* This is the final big of factoring. This shares cases in suboperandChris Lattner2005-01-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | differences, which means that identical instructions (after stripping off the first literal string) do not run any different code at all. On the X86, this turns this code: switch (MI->getOpcode()) { case X86::ADC32mi: printOperand(MI, 4, MVT::i32); break; case X86::ADC32mi8: printOperand(MI, 4, MVT::i8); break; case X86::ADC32mr: printOperand(MI, 4, MVT::i32); break; case X86::ADD32mi: printOperand(MI, 4, MVT::i32); break; case X86::ADD32mi8: printOperand(MI, 4, MVT::i8); break; case X86::ADD32mr: printOperand(MI, 4, MVT::i32); break; case X86::AND32mi: printOperand(MI, 4, MVT::i32); break; case X86::AND32mi8: printOperand(MI, 4, MVT::i8); break; case X86::AND32mr: printOperand(MI, 4, MVT::i32); break; case X86::CMP32mi: printOperand(MI, 4, MVT::i32); break; case X86::CMP32mr: printOperand(MI, 4, MVT::i32); break; case X86::MOV32mi: printOperand(MI, 4, MVT::i32); break; case X86::MOV32mr: printOperand(MI, 4, MVT::i32); break; case X86::OR32mi: printOperand(MI, 4, MVT::i32); break; case X86::OR32mi8: printOperand(MI, 4, MVT::i8); break; case X86::OR32mr: printOperand(MI, 4, MVT::i32); break; case X86::ROL32mi: printOperand(MI, 4, MVT::i8); break; case X86::ROR32mi: printOperand(MI, 4, MVT::i8); break; case X86::SAR32mi: printOperand(MI, 4, MVT::i8); break; case X86::SBB32mi: printOperand(MI, 4, MVT::i32); break; case X86::SBB32mi8: printOperand(MI, 4, MVT::i8); break; case X86::SBB32mr: printOperand(MI, 4, MVT::i32); break; case X86::SHL32mi: printOperand(MI, 4, MVT::i8); break; case X86::SHLD32mrCL: printOperand(MI, 4, MVT::i32); break; case X86::SHR32mi: printOperand(MI, 4, MVT::i8); break; case X86::SHRD32mrCL: printOperand(MI, 4, MVT::i32); break; case X86::SUB32mi: printOperand(MI, 4, MVT::i32); break; case X86::SUB32mi8: printOperand(MI, 4, MVT::i8); break; case X86::SUB32mr: printOperand(MI, 4, MVT::i32); break; case X86::TEST32mi: printOperand(MI, 4, MVT::i32); break; case X86::TEST32mr: printOperand(MI, 4, MVT::i32); break; case X86::TEST8mi: printOperand(MI, 4, MVT::i8); break; case X86::XCHG32mr: printOperand(MI, 4, MVT::i32); break; case X86::XOR32mi: printOperand(MI, 4, MVT::i32); break; case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break; case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break; } into this: switch (MI->getOpcode()) { case X86::ADC32mi: case X86::ADC32mr: case X86::ADD32mi: case X86::ADD32mr: case X86::AND32mi: case X86::AND32mr: case X86::CMP32mi: case X86::CMP32mr: case X86::MOV32mi: case X86::MOV32mr: case X86::OR32mi: case X86::OR32mr: case X86::SBB32mi: case X86::SBB32mr: case X86::SHLD32mrCL: case X86::SHRD32mrCL: case X86::SUB32mi: case X86::SUB32mr: case X86::TEST32mi: case X86::TEST32mr: case X86::XCHG32mr: case X86::XOR32mi: case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break; case X86::ADC32mi8: case X86::ADD32mi8: case X86::AND32mi8: case X86::OR32mi8: case X86::ROL32mi: case X86::ROR32mi: case X86::SAR32mi: case X86::SBB32mi8: case X86::SHL32mi: case X86::SHR32mi: case X86::SUB32mi8: case X86::TEST8mi: case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break; } After this, the generated asmwriters look pretty much as though they were generated by hand. This shrinks the X86 asmwriter.inc files from 55101->39669 and 55429->39551 bytes each, and PPC from 16766->12859 bytes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19760 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement *even more* factoring. In particular, if all of the instructionChris Lattner2005-01-22
| | | | | | | | | | | | | | | | | | | strings starts out with a constant string, we emit the string first, using a table lookup (instead of a switch statement). Because this is usually the opcode portion of the asm string, the differences between the instructions have now been greatly reduced. This allows many more case statements to be grouped together. This patch also allows instruction cases to be grouped together when the instruction patterns are exactly identical (common after the opcode string has been ripped off), and when the differing operand is a MachineInstr operand that needs to be formatted. The end result of this is a mean and lean generated AsmPrinter! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19759 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix VC++ compilation errorJeff Cohen2005-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19757 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement factoring of instruction pattern strings. In particular, instead ofChris Lattner2005-01-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | emitting code like this: case PPC::ADD: O << "add "; printOperand(MI, 0, MVT::i64); O << ", "; prin tOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << '\n '; break; case PPC::ADDC: O << "addc "; printOperand(MI, 0, MVT::i64); O << ", "; pr intOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << ' \n'; break; case PPC::ADDE: O << "adde "; printOperand(MI, 0, MVT::i64); O << ", "; pr intOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << ' \n'; break; ... Emit code like this: case PPC::ADD: case PPC::ADDC: case PPC::ADDE: ... switch (MI->getOpcode()) { case PPC::ADD: O << "add "; break; case PPC::ADDC: O << "addc "; break; case PPC::ADDE: O << "adde "; break; ... } printOperand(MI, 0, MVT::i64); O << ", "; printOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << "\n"; break; This shrinks the PPC asm writer from 24785->15205 bytes (even though the new asmwriter has much more whitespace than the old one), and the X86 printers shrink quite a bit too. The important implication of this is that GCC no longer hits swap when building the PPC backend in optimized mode. Thus this fixes PR448. -Chris git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19755 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the ::: problemChris Lattner2005-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19754 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor refactoring, no functionality change.Chris Lattner2005-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19753 91177308-0d34-0410-b5e6-96231b3b80d8
* Seperate asmstring parsing from emission. This allows the code to be simplerChris Lattner2005-01-22
| | | | | | | | | | | | | | | | | | | | and more understandable. It also allows us to do simple things like fold consequtive literal strings together. For example, instead of emitting this for the X86 backend: O << "adc" << "l" << " "; we now generate this: O << "adcl "; *whoa* :) This shrinks the X86 asmwriters from 62729->58267 and 65176->58644 bytes for the intel/att asm writers respectively. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19749 91177308-0d34-0410-b5e6-96231b3b80d8
* make double-dollar properly escape asmstringsAndrew Lenharth2005-01-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19740 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't emit the method into the llvm namespace, let the #includer decide ↵Chris Lattner2004-10-12
| | | | | | where it goes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16934 91177308-0d34-0410-b5e6-96231b3b80d8
* Correctly parse variant notationChris Lattner2004-10-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16637 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not #include files into the llvm namespaceChris Lattner2004-08-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15849 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the AsmWriter a first-class tblgen object. Allow targets to specifyChris Lattner2004-08-14
| | | | | | | name of the generated asmwriter class, and the name of the format string. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15747 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix minor bug in previous checkinChris Lattner2004-08-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15649 91177308-0d34-0410-b5e6-96231b3b80d8
* change how we invoke the printer. Instead of passing in the MO directly,Chris Lattner2004-08-11
| | | | | | | pass in the MI, operand number, and the type of the operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15645 91177308-0d34-0410-b5e6-96231b3b80d8
* Be pickyChris Lattner2004-08-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15400 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for asm printing machine instructions that have operands.Chris Lattner2004-08-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15391 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial cut at an asm writer emitter. So far, this only handles emission ofChris Lattner2004-08-01
instructions, and only instructions that take no operands at that! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15386 91177308-0d34-0410-b5e6-96231b3b80d8
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