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authorMisha Brukman <brukman+llvm@gmail.com>2005-04-22 00:00:37 +0000
committerMisha Brukman <brukman+llvm@gmail.com>2005-04-22 00:00:37 +0000
commit3da94aec4d429b2ba0f65fa040c33650cade196b (patch)
treef54f7eb8e1f7b75bc469c85c868c76b3860e0297 /utils/TableGen/AsmWriterEmitter.cpp
parentfd93908ae8b9684fe71c239e3c6cfe13ff6a2663 (diff)
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Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21428 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/AsmWriterEmitter.cpp')
-rw-r--r--utils/TableGen/AsmWriterEmitter.cpp16
1 files changed, 8 insertions, 8 deletions
diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index 9b492bc417..41ecc40069 100644
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -1,10 +1,10 @@
//===- AsmWriterEmitter.cpp - Generate an assembly writer -----------------===//
-//
+//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
+//
//===----------------------------------------------------------------------===//
//
// This tablegen backend is emits an assembly printer for the current target.
@@ -64,7 +64,7 @@ namespace {
struct AsmWriterInst {
std::vector<AsmWriterOperand> Operands;
const CodeGenInstruction *CGI;
-
+
AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant);
/// MatchesAllButOneOp - If this instruction is exactly identical to the
@@ -198,7 +198,7 @@ unsigned AsmWriterInst::MatchesAllButOneOp(const AsmWriterInst &Other)const{
if (Operands[i] != Other.Operands[i])
if (MismatchOperand != ~0U) // Already have one mismatch?
return ~1U;
- else
+ else
MismatchOperand = i;
}
return MismatchOperand;
@@ -268,7 +268,7 @@ static void EmitInstructions(std::vector<AsmWriterInst> &Insts,
OpsToPrint.push_back(std::make_pair(Namespace+"::"+
FirstInst.CGI->TheDef->getName(),
FirstInst.Operands[i]));
-
+
for (unsigned si = 0, e = SimilarInsts.size(); si != e; ++si) {
AsmWriterInst &AWI = SimilarInsts[si];
OpsToPrint.push_back(std::make_pair(Namespace+"::"+
@@ -313,7 +313,7 @@ void AsmWriterEmitter::run(std::ostream &O) {
// If all of the instructions start with a constant string (a very very common
// occurance), emit all of the constant strings as a big table lookup instead
- // of requiring a switch for them.
+ // of requiring a switch for them.
bool AllStartWithString = true;
for (unsigned i = 0, e = Instructions.size(); i != e; ++i)
@@ -323,7 +323,7 @@ void AsmWriterEmitter::run(std::ostream &O) {
AllStartWithString = false;
break;
}
-
+
if (AllStartWithString) {
// Compute the CodeGenInstruction -> AsmWriterInst mapping. Note that not
// all machine instructions are necessarily being printed, so there may be
@@ -361,7 +361,7 @@ void AsmWriterEmitter::run(std::ostream &O) {
O << " switch (MI->getOpcode()) {\n"
" default: return false;\n";
-
+
while (!Instructions.empty())
EmitInstructions(Instructions, O);