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* Attempt to silence known valgrind errors.Andrew Trick2011-09-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139048 91177308-0d34-0410-b5e6-96231b3b80d8
* Make RecordVal Name an InitDavid Greene2011-09-02
| | | | | | | | | Store a RecordVal's name as an Init to allow class-qualified Record members to reference Records that have Init names. We'll use this to provide more programmability in how we name defs and their associated members. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139031 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702.Kevin Enderby2011-09-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139014 91177308-0d34-0410-b5e6-96231b3b80d8
* Make IC_VEX* not inherit from IC_*. Prevents instructions with no VEX form ↵Craig Topper2011-09-02
| | | | | | from disassembling to their non-VEX form. Also prevents weak filter collisons that were keeping valid VEX instructions from decoding properly. Make VEX_L* not inherit from VEX_* because the VEX.L bit always important. This stops packed int VEX encodings from being disassembled when specified with VEX.L=1. Fixes PR10831 and PR10806. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138997 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix up r137380 based on post-commit review by Jim Grosbach.James Molloy2011-09-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138948 91177308-0d34-0410-b5e6-96231b3b80d8
* lit: Normalize pathsep slashes also on %T.NAKAMURA Takumi2011-08-31
| | | | | | On Python-w32 with mingw msys bash, %T was replaced to "x:\foo\bar...". msys bash cannot handle DOSish paths. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138852 91177308-0d34-0410-b5e6-96231b3b80d8
* Follow up to r138791.Evan Cheng2011-08-30
| | | | | | | | | | | | | Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to call a target hook to adjust the instruction. For ARM, this is used to adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC instructions have implicit def of CPSR (required since it now uses CPSR physical register dependency rather than "glue"). If the carry flag is used, then the target hook will *fill in* the optional operand with CPSR. Otherwise, the hook will remove the CPSR implicit def from the MachineInstr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138810 91177308-0d34-0410-b5e6-96231b3b80d8
* Lit option for ignoring stderr output.Andrew Trick2011-08-30
| | | | | | | | | This is useful for testing a build a temporarily hand instrumented build. Patch by arrowdodger! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138804 91177308-0d34-0410-b5e6-96231b3b80d8
* Add vvvv support to disassembling of instructions with MRMDestMem and ↵Craig Topper2011-08-30
| | | | | | MRMDestReg form. Needed to support mem dest form of vmaskmovps/d. Fixes PR10807. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138795 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217Kevin Enderby2011-08-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138771 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverted r138652, valgrind doesn't understand obj:*/tblgen.Andrew Trick2011-08-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138703 91177308-0d34-0410-b5e6-96231b3b80d8
* Improve encoding support for BLX with immediat eoperands, and fix a BLX ↵Owen Anderson2011-08-26
| | | | | | decoding bug this uncovered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138675 91177308-0d34-0410-b5e6-96231b3b80d8
* valgrind: Always suppress tblgen leaks.Andrew Trick2011-08-26
| | | | | | | I'll clean up the rest of the XFAIL: vg_leak lines if this works. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138652 91177308-0d34-0410-b5e6-96231b3b80d8
* lit: Add %T as a replacement for the output directoryDouglas Gregor2011-08-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138640 91177308-0d34-0410-b5e6-96231b3b80d8
* Give ATTR_VEX higher priority when generating the disassembler context ↵Craig Topper2011-08-25
| | | | | | table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138552 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb parsing and encoding support for ADD SP instructions.Jim Grosbach2011-08-24
| | | | | | | | Fix the test FIXME and add parsing support for the ADD (SP plus immediate) and ADD (SP plus register) instruction forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138488 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.Jim Grosbach2011-08-24
| | | | | | | | | | Add the predicate operand to the instructions. Update the back end accordingly where the instructions are used. Restrict the SP operands to actually only be SP, as otherwise these break assembly parsing for the normal instruction variants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138445 91177308-0d34-0410-b5e6-96231b3b80d8
* Thread safety: Adding in an option for variadic expr* array of argumentsCaitlin Sadowski2011-08-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138351 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix fpimmm->fpimm typo.Eric Christopher2011-08-23
| | | | | | | Patch by Micah Villmow! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138330 91177308-0d34-0410-b5e6-96231b3b80d8
* utils/lit/lit/TestingConfig.py: Pass TEMP and TMP to tests on Win32 hosts.NAKAMURA Takumi2011-08-20
| | | | | | Win32 GetTempPath() tends to pick up %WINDIR% when neither TEMP nor TMP was found. %WINDIR% should not be treated writable on recent Windows OS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138192 91177308-0d34-0410-b5e6-96231b3b80d8
* utils/lit/lit/TestingConfig.py: Split out environment vars for Win32.NAKAMURA Takumi2011-08-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138191 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow non zero_reg explicit values for OptionalDefOperands in aliases.Jim Grosbach2011-08-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138073 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up. Formatting.Jim Grosbach2011-08-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138067 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow the MCDisassembler to return a "soft fail" status code, indicating an ↵Owen Anderson2011-08-17
| | | | | | | | | instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment. Patch by James Molloy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137830 91177308-0d34-0410-b5e6-96231b3b80d8
* Update uwtable vim color!Bruno Cardoso Lopes2011-08-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137806 91177308-0d34-0410-b5e6-96231b3b80d8
* Prefer diagnostics from target predicate in asm matcher.Jim Grosbach2011-08-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137742 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid evaluating Neon macro arguments more than once by disabling type checks.Bob Wilson2011-08-15
| | | | | | | | | | It turns out that the use of "__extension__" in these macros was disabling the expected "incompatible pointer" warnings, so these type checks were not doing anything anyway. They introduced a serious bug by evaluating some macro arguments twice, which is a big problem for arguments with side effects. I'll have to find another way to get the right type checking. Radar 9947657. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137680 91177308-0d34-0410-b5e6-96231b3b80d8
* MCTargetAsmParser target match predicate support.Jim Grosbach2011-08-15
| | | | | | | | | | Allow a target assembly parser to do context sensitive constraint checking on a potential instruction match. This will be used, for example, to handle Thumb2 IT block parsing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137675 91177308-0d34-0410-b5e6-96231b3b80d8
* Move MatchResultTy enum into base class definition.Jim Grosbach2011-08-15
| | | | | | | | No need for it to be redefined as part of every derived target asm parser class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137649 91177308-0d34-0410-b5e6-96231b3b80d8
* Make Record Name an InitDavid Greene2011-08-10
| | | | | | | | | | | Use an Init (ultimately a StringInit) to represent the Record name. This allows the name to be composed by standard TableGen operators. This will enable us to get rid of the ugly #NAME# hack processing and naturally replace it with operators. It also increases flexibility and power of the TableGen language by allowing record identifiers to be computed dynamically. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137232 91177308-0d34-0410-b5e6-96231b3b80d8
* Add getAsUnquotedStringDavid Greene2011-08-10
| | | | | | | | | | | Add a method to return an Init as an unquoted string. This primarily affects StringInit where we return the value without surrounding it with quotes. This is in preparation for removing the ugly #NAME# hack and replacing it with standard TabelGen operators. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137231 91177308-0d34-0410-b5e6-96231b3b80d8
* Update comment.Eric Christopher2011-08-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137188 91177308-0d34-0410-b5e6-96231b3b80d8
* clang is the new black.Eric Christopher2011-08-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137187 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix an oversight in the FixedLenDecoderEmitter where we weren't correctly ↵Owen Anderson2011-08-09
| | | | | | checking the success result of custom decoder hooks on singleton decodings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137171 91177308-0d34-0410-b5e6-96231b3b80d8
* Create a new register class for the set of all GPRs except the PC. Use it ↵Owen Anderson2011-08-09
| | | | | | to tighten our decoding of BFI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137168 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace the existing ARM disassembler with a new one based on the ↵Owen Anderson2011-08-09
| | | | | | | | | | | FixedLenDecoderEmitter. This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137144 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix encodings for Thumb ASR and LSR immediate operands. They encode the ↵Owen Anderson2011-08-08
| | | | | | range 1-32, with 32 encoded as 0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137062 91177308-0d34-0410-b5e6-96231b3b80d8
* LDCL_POST and STCL_POST need one's-complement offsets, rather than two's ↵Owen Anderson2011-08-04
| | | | | | complement offsets. Add an appropriate immediate type for them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136896 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM refactoring assembly parsing of memory address operands.Jim Grosbach2011-08-03
| | | | | | | | | | | | | | | | | | | | | | | | Memory operand parsing is a bit haphazzard at the moment, in no small part due to the even more haphazzard representations of memory operands in the .td files. Start cleaning that all up, at least a bit. The addressing modes in the .td files will be being simplified to not be so monolithic, especially with regards to immediate vs. register offsets and post-indexed addressing. addrmode3 is on its way with this patch, for example. This patch is foundational to enable going back to smaller incremental patches for the individual memory referencing instructions themselves. It does just enough to get the basics in place and handle the "make check" regression tests we already have. Follow-up work will be fleshing out the details and adding more robust test cases for the individual instructions, starting with ARM mode and moving from there into Thumb and Thumb2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136845 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: rename addrmode7 to addr_offset_none.Jim Grosbach2011-08-02
| | | | | | | Use a more descriptive name so the code is more self-documenting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136704 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the FixedLengthDecoderEmitter smart enough to autogenerate decoders for ↵Owen Anderson2011-08-01
| | | | | | encodings like "let Inst{11-7} = foo;", where the RHS has no bitwidth specifiers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136660 91177308-0d34-0410-b5e6-96231b3b80d8
* The FixedLenDecoder needs to gracefully handle failing per-instruction ↵Owen Anderson2011-08-01
| | | | | | decoder hooks in addition to per-operand decoder hooks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136645 91177308-0d34-0410-b5e6-96231b3b80d8
* Enhance the fixed length disassembler to better handle operand decoding ↵Owen Anderson2011-08-01
| | | | | | failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136635 91177308-0d34-0410-b5e6-96231b3b80d8
* Correctly handle scattered operands where the bits of the operand are ↵Owen Anderson2011-07-29
| | | | | | contiguous, but out of order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136534 91177308-0d34-0410-b5e6-96231b3b80d8
* Unconstify InitsDavid Greene2011-07-29
| | | | | | | | Remove const qualifiers from Init references, per Chris' request. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136531 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a blank line from the top.David Greene2011-07-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136511 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX] Make DagInits UniqueDavid Greene2011-07-29
| | | | | | Make sure DagInits are unique and created only once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136501 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX] Make FieldInit UniqueDavid Greene2011-07-29
| | | | | | Make sure FieldInits are unique and created only once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136500 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX] Make VarListElementInit UniqueDavid Greene2011-07-29
| | | | | | Make sure VarListElementInits are unique and created only once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136499 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX] Make VarBitInit UniqueDavid Greene2011-07-29
| | | | | | Make sure VarBitInits are unique and created only once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136498 91177308-0d34-0410-b5e6-96231b3b80d8
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