blob: afed38a334e6224212a7ca423dc67fb1d6cc7f04 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
|
//===-- llvm/CodeGen/SSARegMap.h --------------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// Map register numbers to register classes that are correctly sized (typed) to
// hold the information. Assists register allocation. Contained by
// MachineFunction, should be deleted by register allocator when it is no
// longer needed.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SSAREGMAP_H
#define LLVM_CODEGEN_SSAREGMAP_H
#include "llvm/Target/MRegisterInfo.h"
#include "Support/DenseMap.h"
namespace llvm {
class TargetRegisterClass;
class SSARegMap {
DenseMap<const TargetRegisterClass*, VirtReg2IndexFunctor> RegClassMap;
unsigned NextRegNum;
public:
SSARegMap() : NextRegNum(MRegisterInfo::FirstVirtualRegister) { }
const TargetRegisterClass* getRegClass(unsigned Reg) {
return RegClassMap[Reg];
}
/// createVirtualRegister - Create and return a new virtual register in the
/// function with the specified register class.
///
unsigned createVirtualRegister(const TargetRegisterClass *RegClass) {
RegClassMap.grow(NextRegNum);
RegClassMap[NextRegNum] = RegClass;
return NextRegNum++;
}
unsigned getLastVirtReg() const {
return NextRegNum - 1;
}
};
} // End llvm namespace
#endif
|
