blob: f1676ca384ced2198f96a2b4b9c2d1aa91357aa2 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
|
//===-- PTXMFInfoExtract.cpp - Extract PTX machine function info ----------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines an information extractor for PTX machine functions.
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "ptx-mf-info-extract"
#include "PTX.h"
#include "PTXTargetMachine.h"
#include "PTXMachineFunctionInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
// NOTE: PTXMFInfoExtract must after register allocation!
namespace {
/// PTXMFInfoExtract - PTX specific code to extract of PTX machine
/// function information for PTXAsmPrinter
///
class PTXMFInfoExtract : public MachineFunctionPass {
private:
static char ID;
public:
PTXMFInfoExtract(PTXTargetMachine &TM, CodeGenOpt::Level OptLevel)
: MachineFunctionPass(ID) {}
virtual bool runOnMachineFunction(MachineFunction &MF);
virtual const char *getPassName() const {
return "PTX Machine Function Info Extractor";
}
}; // class PTXMFInfoExtract
} // end anonymous namespace
using namespace llvm;
char PTXMFInfoExtract::ID = 0;
bool PTXMFInfoExtract::runOnMachineFunction(MachineFunction &MF) {
PTXMachineFunctionInfo *MFI = MF.getInfo<PTXMachineFunctionInfo>();
MachineRegisterInfo &MRI = MF.getRegInfo();
// Generate list of all virtual registers used in this function
for (unsigned i = 0; i < MRI.getNumVirtRegs(); ++i) {
unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
const TargetRegisterClass *TRC = MRI.getRegClass(Reg);
unsigned RegType;
if (TRC == &PTX::RegPredRegClass)
RegType = PTXRegisterType::Pred;
else if (TRC == &PTX::RegI16RegClass)
RegType = PTXRegisterType::B16;
else if (TRC == &PTX::RegI32RegClass)
RegType = PTXRegisterType::B32;
else if (TRC == &PTX::RegI64RegClass)
RegType = PTXRegisterType::B64;
else if (TRC == &PTX::RegF32RegClass)
RegType = PTXRegisterType::F32;
else if (TRC == &PTX::RegF64RegClass)
RegType = PTXRegisterType::F64;
else
llvm_unreachable("Unkown register class.");
MFI->addRegister(Reg, RegType, PTXRegisterSpace::Reg);
}
return false;
}
FunctionPass *llvm::createPTXMFInfoExtract(PTXTargetMachine &TM,
CodeGenOpt::Level OptLevel) {
return new PTXMFInfoExtract(TM, OptLevel);
}
|
