test/TableGen/UnsetBitInit.td


1
2
3
4
5
6
7
8
9
10
11

// RUN: llvm-tblgen %s
// XFAIL: vg_leak
class x {
  field bits<32> A;
}

class y<bits<2> B> : x {
  let A{21-20} = B;
}

def z : y<{0,?}>;