2008-10-23 Mike Frysinger <vapier@gentoo.org>

	Port strace to the Blackfin architecture.
	* configure.ac: Add bfin to supported architectures.
	* process.c: Skip u_fpvalid/u_fpstate for Blackfin architecture.
	(change_syscall): Support Blackfin architecture.
	* syscall.c: Declare r0 for Blackfin architecture.
	(get_scno): Decode Blackfin syscall number.
	(syscall_fixup): Extract Blackfin return value.
	(get_error): Decode Blackfin return value.
	(force_result): Poke Blackfin return value.
	(syscall_enter): Extract Blackfin syscall arguments.
	* defs.h: Define TCB_WAITEXECVE for Blackfin architecture.
	* linux/syscall.h (sys_sram_alloc): Declare for Blackfin
	architecture.
	* system.c (sys_sram_alloc): Decode Blackfin sram_alloc() syscall.
	* util.c (getpc): Handle PC on Blackfin architecture.
	(printcall): Likewise.
	* linux/bfin/ioctlent.h, linux/bfin/syscallent.h: New Blackfin
	headers.
	* Makefile.am (EXTRA_DIST): Add linux/bfin/ioctlent.h and
	linux/bfin/syscallent.h.

1 files changed, 27 insertions, 0 deletions

diff --git a/system.c b/system.c
index 9480004..80b105b 100644
--- a/system.c
+++ b/system.c
@@ -293,6 +293,33 @@ struct tcb *tcp;
 }
 #endif /* M68K */
 
+#ifdef BFIN
+
+#include <bfin_sram.h>
+
+static const struct xlat sram_alloc_flags[] = {
+	{ L1_INST_SRAM,		"L1_INST_SRAM" },
+	{ L1_DATA_A_SRAM,	"L1_DATA_A_SRAM" },
+	{ L1_DATA_B_SRAM,	"L1_DATA_B_SRAM" },
+	{ L1_DATA_SRAM,		"L1_DATA_SRAM" },
+	{ 0,			NULL },
+};
+
+int
+sys_sram_alloc(tcp)
+struct tcb *tcp;
+{
+	if (entering(tcp)) {
+		/* size */
+		tprintf("%zu, ", tcp->u_arg[0]);
+		/* flags */
+		printxval(sram_alloc_flags, tcp->u_arg[1], "L1_???_SRAM");
+	}
+	return 1;
+}
+
+#endif
+
 #endif /* LINUX */
 
 #ifdef SUNOS4