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authorNick Lewycky <nicholas@mxc.ca>2008-11-02 02:41:50 +0000
committerNick Lewycky <nicholas@mxc.ca>2008-11-02 02:41:50 +0000
commit8e39432ea9751917d5cef1f18f6c32382c384d58 (patch)
tree9d162738d97b827638c42c0c8d9526395f19726a
parent21440acc06b6451ad5c0678e3f15ee08b1f1d206 (diff)
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Fix demanded bits analysis with srem by negative number. Based on a patch
by Richard Osborne. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58555 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Transforms/Scalar/InstructionCombining.cpp6
-rw-r--r--test/Transforms/InstCombine/2008-11-01-SRemDemandedBits.ll8
2 files changed, 11 insertions, 3 deletions
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 75a1ffea6b..3210b12cbb 100644
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -1274,12 +1274,12 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
break;
case Instruction::SRem:
if (ConstantInt *Rem = dyn_cast<ConstantInt>(I->getOperand(1))) {
- APInt RA = Rem->getValue();
- if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
+ APInt RA = Rem->getValue().abs();
+ if (RA.isPowerOf2()) {
if (DemandedMask.ule(RA)) // srem won't affect demanded bits
return UpdateValueUsesWith(I, I->getOperand(0));
- APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
+ APInt LowBits = RA - 1;
APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
if (SimplifyDemandedBits(I->getOperand(0), Mask2,
LHSKnownZero, LHSKnownOne, Depth+1))
diff --git a/test/Transforms/InstCombine/2008-11-01-SRemDemandedBits.ll b/test/Transforms/InstCombine/2008-11-01-SRemDemandedBits.ll
new file mode 100644
index 0000000000..46e98eb362
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-11-01-SRemDemandedBits.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {ret i1 true}
+; PR2993
+
+define i1 @foo(i32 %x) {
+ %1 = srem i32 %x, -1
+ %2 = icmp eq i32 %1, 0
+ ret i1 %2
+}