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| author | Richard Osborne <richard@xmos.com> | 2011-05-31 16:30:33 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2011-05-31 16:30:33 +0000 |
| commit | a9b08aa25e160a6e753bb5f97b77d755766d4ed3 (patch) | |
| tree | bd058a9465a97dc05831961f7c2aba6652c4e681 | |
| parent | 9497466190a46ba06bf856302b1c81f1c4b5c951 (diff) | |
| download | llvm-a9b08aa25e160a6e753bb5f97b77d755766d4ed3.tar.gz llvm-a9b08aa25e160a6e753bb5f97b77d755766d4ed3.tar.bz2 llvm-a9b08aa25e160a6e753bb5f97b77d755766d4ed3.tar.xz | |
Fix 80 column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132341 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | include/llvm/IntrinsicsXCore.td | 4 | ||||
| -rw-r--r-- | lib/Target/XCore/XCoreInstrInfo.td | 7 |
2 files changed, 8 insertions, 3 deletions
diff --git a/include/llvm/IntrinsicsXCore.td b/include/llvm/IntrinsicsXCore.td index bab79b2bf8..a062fc4fc7 100644 --- a/include/llvm/IntrinsicsXCore.td +++ b/include/llvm/IntrinsicsXCore.td @@ -14,7 +14,9 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.". def int_xcore_crc8 : Intrinsic<[llvm_i32_ty, llvm_i32_ty], [llvm_i32_ty,llvm_i32_ty,llvm_i32_ty], [IntrNoMem]>; - def int_xcore_crc32 : Intrinsic<[llvm_i32_ty],[llvm_i32_ty,llvm_i32_ty,llvm_i32_ty],[IntrNoMem]>; + def int_xcore_crc32 : Intrinsic<[llvm_i32_ty], + [llvm_i32_ty,llvm_i32_ty,llvm_i32_ty], + [IntrNoMem]>; def int_xcore_getid : Intrinsic<[llvm_i32_ty],[],[IntrNoMem]>; def int_xcore_getps : Intrinsic<[llvm_i32_ty],[llvm_i32_ty]>; def int_xcore_setps : Intrinsic<[],[llvm_i32_ty, llvm_i32_ty]>; diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td index 492596d1f3..55c7527f4e 100644 --- a/lib/Target/XCore/XCoreInstrInfo.td +++ b/lib/Target/XCore/XCoreInstrInfo.td @@ -474,9 +474,12 @@ def XOR_l3r : FL3R<"xor", xor>; defm ASHR : FL3R_L2RBITP<"ashr", sra>; let Constraints = "$src1 = $dst" in -def CRC_l3r : _FL3R<(outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3), +def CRC_l3r : _FL3R<(outs GRRegs:$dst), + (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3), "crc32 $dst, $src2, $src3", - [(set GRRegs:$dst, (int_xcore_crc32 GRRegs:$src1, GRRegs:$src2, GRRegs:$src3))]>; + [(set GRRegs:$dst, + (int_xcore_crc32 GRRegs:$src1, GRRegs:$src2, + GRRegs:$src3))]>; // TODO inpw, outpw let mayStore=1 in { |