diff options
Diffstat (limited to 'lib/Target/Mips/AsmParser/MipsAsmParser.cpp')
-rw-r--r-- | lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 68 |
1 files changed, 67 insertions, 1 deletions
diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 58b5590257..43bd345208 100644 --- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -11,11 +11,20 @@ #include "llvm/MC/MCParser/MCAsmLexer.h" #include "llvm/MC/MCTargetAsmParser.h" #include "llvm/Support/TargetRegistry.h" +#include "llvm/MC/MCParser/MCParsedAsmOperand.h" +#include "llvm/MC/MCTargetAsmParser.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/Support/MathExtras.h" using namespace llvm; namespace { class MipsAsmParser : public MCTargetAsmParser { + +#define GET_ASSEMBLER_HEADER +#include "MipsGenAsmMatcher.inc" + bool MatchAndEmitInstruction(SMLoc IDLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands, MCStreamer &Out); @@ -23,10 +32,11 @@ class MipsAsmParser : public MCTargetAsmParser { bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc); bool ParseInstruction(StringRef Name, SMLoc NameLoc, - SmallVectorImpl<MCParsedAsmOperand*> &Operands); + SmallVectorImpl<MCParsedAsmOperand*> &Operands); bool ParseDirective(AsmToken DirectiveID); + OperandMatchResultTy parseMemOperand(SmallVectorImpl<MCParsedAsmOperand*>&); public: MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser) : MCTargetAsmParser() { @@ -35,6 +45,57 @@ public: }; } +namespace { + +/// MipsOperand - Instances of this class represent a parsed Mips machine +/// instruction. +class MipsOperand : public MCParsedAsmOperand { + enum KindTy { + k_CondCode, + k_CoprocNum, + k_Immediate, + k_Memory, + k_PostIndexRegister, + k_Register, + k_Token + } Kind; + + MipsOperand(KindTy K) : MCParsedAsmOperand(), Kind(K) {} +public: + void addRegOperands(MCInst &Inst, unsigned N) const { + llvm_unreachable("unimplemented!"); + } + void addExpr(MCInst &Inst, const MCExpr *Expr) const{ + llvm_unreachable("unimplemented!"); + } + void addImmOperands(MCInst &Inst, unsigned N) const { + llvm_unreachable("unimplemented!"); + } + void addMemOperands(MCInst &Inst, unsigned N) const { + llvm_unreachable("unimplemented!"); + } + + bool isReg() const { return Kind == k_Register; } + bool isImm() const { return Kind == k_Immediate; } + bool isToken() const { return Kind == k_Token; } + bool isMem() const { return Kind == k_Memory; } + + StringRef getToken() const { + assert(Kind == k_Token && "Invalid access!"); + return ""; + } + + unsigned getReg() const { + assert((Kind == k_Register) && "Invalid access!"); + return 0; + } + + virtual void print(raw_ostream &OS) const { + llvm_unreachable("unimplemented!"); + } +}; +} + bool MipsAsmParser:: MatchAndEmitInstruction(SMLoc IDLoc, SmallVectorImpl<MCParsedAsmOperand*> &Operands, @@ -58,6 +119,11 @@ ParseDirective(AsmToken DirectiveID) { return true; } +MipsAsmParser::OperandMatchResultTy MipsAsmParser:: + parseMemOperand(SmallVectorImpl<MCParsedAsmOperand*>&) { + return MatchOperand_ParseFail; +} + extern "C" void LLVMInitializeMipsAsmParser() { RegisterMCAsmParser<MipsAsmParser> X(TheMipsTarget); RegisterMCAsmParser<MipsAsmParser> Y(TheMipselTarget); |