summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorLang Hames <lhames@gmail.com>2014-04-21 08:18:53 +0000
committerLang Hames <lhames@gmail.com>2014-04-21 08:18:53 +0000
commitf69bb5e43c1427d23800e4e678a7c2f2088f0c88 (patch)
treed0ff7069c0da0d27b4acfaf87c300004cb00711d
parenta21cd0433e7cde887b061ecac08c0de9f1cb8cb9 (diff)
downloadllvm-f69bb5e43c1427d23800e4e678a7c2f2088f0c88.tar.gz
llvm-f69bb5e43c1427d23800e4e678a7c2f2088f0c88.tar.bz2
llvm-f69bb5e43c1427d23800e4e678a7c2f2088f0c88.tar.xz
[X86] ISEL (and X, <constant mask>) to BZHI when BMI2 is available.
Generating BZHI in the variable mask case, i.e. (and X, (sub (shl 1, N), 1)), was already supported, but we were missing the constant-mask case. This patch fixes that. <rdar://problem/15480077> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206738 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp14
-rw-r--r--test/CodeGen/X86/bmi.ll18
2 files changed, 32 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 306fb7e199..d867414a98 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -18503,6 +18503,20 @@ static SDValue PerformAndCombine(SDNode *N, SelectionDAG &DAG,
}
} // BEXTR
+ // Check for BZHI with contiguous mask: (and X, 0x0..0f..f)
+ // This should be checked after BEXTR - when X is a shift, a BEXTR is
+ // preferrable.
+ if (Subtarget->hasBMI2()) {
+ if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
+ uint64_t Mask = C->getZExtValue();
+ if (isMask_64(Mask)) {
+ unsigned LZ = CountTrailingOnes_64(Mask);
+ return DAG.getNode(X86ISD::BZHI, DL, VT, N0,
+ DAG.getConstant(LZ, MVT::i8));
+ }
+ }
+ }
+
return SDValue();
}
diff --git a/test/CodeGen/X86/bmi.ll b/test/CodeGen/X86/bmi.ll
index 242075a878..1dc2edb7ea 100644
--- a/test/CodeGen/X86/bmi.ll
+++ b/test/CodeGen/X86/bmi.ll
@@ -216,6 +216,24 @@ entry:
; CHECK: bzhiq
}
+define i32 @bzhi32_constant_mask(i32 %x) #0 {
+entry:
+ %and = and i32 %x, 1073741823
+ ret i32 %and
+; CHECK-LABEL: bzhi32_constant_mask:
+; CHECK: movb $30, %al
+; CHECK: bzhil %eax, %edi, %eax
+}
+
+define i64 @bzhi64_constant_mask(i64 %x) #0 {
+entry:
+ %and = and i64 %x, 4611686018427387903
+ ret i64 %and
+; CHECK-LABEL: bzhi64_constant_mask:
+; CHECK: movb $62, %al
+; CHECK: bzhiq %rax, %rdi, %rax
+}
+
define i32 @blsi32(i32 %x) nounwind readnone {
%tmp = sub i32 0, %x
%tmp2 = and i32 %x, %tmp