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authorTim Northover <tnorthover@apple.com>2014-05-24 12:50:23 +0000
committerTim Northover <tnorthover@apple.com>2014-05-24 12:50:23 +0000
commit29f94c72014eaa5d0d3b920686e689e79759cacb (patch)
treecb2e1cc50e9a80c55f33e15ec2ce110a6b05019a /configure
parent9105f66d6f3cb6330ce77a88a0ef1ec0744aba85 (diff)
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AArch64/ARM64: move ARM64 into AArch64's place
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'configure')
-rwxr-xr-xconfigure18
1 files changed, 9 insertions, 9 deletions
diff --git a/configure b/configure
index a5babe9c23..e1959dfee6 100755
--- a/configure
+++ b/configure
@@ -4151,9 +4151,9 @@ else
amd64-* | x86_64-*) llvm_cv_target_arch="x86_64" ;;
sparc*-*) llvm_cv_target_arch="Sparc" ;;
powerpc*-*) llvm_cv_target_arch="PowerPC" ;;
- arm64*-*) llvm_cv_target_arch="ARM64" ;;
+ arm64*-*) llvm_cv_target_arch="AArch64" ;;
arm*-*) llvm_cv_target_arch="ARM" ;;
- aarch64*-*) llvm_cv_target_arch="ARM64" ;;
+ aarch64*-*) llvm_cv_target_arch="AArch64" ;;
mips-* | mips64-*) llvm_cv_target_arch="Mips" ;;
mipsel-* | mips64el-*) llvm_cv_target_arch="Mips" ;;
xcore-*) llvm_cv_target_arch="XCore" ;;
@@ -4188,9 +4188,9 @@ case $host in
amd64-* | x86_64-*) host_arch="x86_64" ;;
sparc*-*) host_arch="Sparc" ;;
powerpc*-*) host_arch="PowerPC" ;;
- arm64*-*) host_arch="ARM64" ;;
+ arm64*-*) host_arch="AArch64" ;;
arm*-*) host_arch="ARM" ;;
- aarch64*-*) host_arch="ARM64" ;;
+ aarch64*-*) host_arch="AArch64" ;;
mips-* | mips64-*) host_arch="Mips" ;;
mipsel-* | mips64el-*) host_arch="Mips" ;;
xcore-*) host_arch="XCore" ;;
@@ -5120,7 +5120,7 @@ else
esac
fi
-TARGETS_WITH_JIT="ARM ARM64 Mips PowerPC SystemZ X86"
+TARGETS_WITH_JIT="ARM AArch64 Mips PowerPC SystemZ X86"
TARGETS_WITH_JIT=$TARGETS_WITH_JIT
@@ -5357,7 +5357,7 @@ _ACEOF
fi
-ALL_TARGETS="X86 Sparc PowerPC ARM ARM64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600"
+ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600"
ALL_TARGETS=$ALL_TARGETS
@@ -5380,8 +5380,8 @@ case "$enableval" in
x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;;
powerpc) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
- aarch64) TARGETS_TO_BUILD="ARM64 $TARGETS_TO_BUILD" ;;
- arm64) TARGETS_TO_BUILD="ARM64 $TARGETS_TO_BUILD" ;;
+ aarch64) TARGETS_TO_BUILD="AArch64 $TARGETS_TO_BUILD" ;;
+ arm64) TARGETS_TO_BUILD="AArch64 $TARGETS_TO_BUILD" ;;
arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
mipsel) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
@@ -5399,7 +5399,7 @@ case "$enableval" in
x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
Sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;;
PowerPC) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
- AArch64) TARGETS_TO_BUILD="ARM64 $TARGETS_TO_BUILD" ;;
+ AArch64) TARGETS_TO_BUILD="AArch64 $TARGETS_TO_BUILD" ;;
ARM) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
Mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
XCore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;