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| author | Chris Lattner <sabre@nondot.org> | 2005-04-13 02:36:41 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-04-13 02:36:41 +0000 |
| commit | ea5761068956b157832d67bcc9d5e8ba706f545c (patch) | |
| tree | 8d1768c21ff85fb38b3e9f6550dc57cf2aca9451 /include | |
| parent | db81ebab89796551eb74100f0c294fae2446d6be (diff) | |
| download | llvm-ea5761068956b157832d67bcc9d5e8ba706f545c.tar.gz llvm-ea5761068956b157832d67bcc9d5e8ba706f545c.tar.bz2 llvm-ea5761068956b157832d67bcc9d5e8ba706f545c.tar.xz | |
Remove the ZERO_EXTEND_INREG node which is redundant with AND
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21263 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAGNodes.h | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 2011eb8771..d605961bb4 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -141,13 +141,12 @@ namespace ISD { SINT_TO_FP, UINT_TO_FP, - // SIGN_EXTEND_INREG/ZERO_EXTEND_INREG - These operators atomically performs - // a SHL/(SRA|SHL) pair to (sign|zero) extend a small value in a large - // integer register (e.g. sign extending the low 8 bits of a 32-bit register - // to fill the top 24 bits with the 7th bit). The size of the smaller type - // is indicated by the ExtraValueType in the MVTSDNode for the operator. + // SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to + // sign extend a small value in a large integer register (e.g. sign + // extending the low 8 bits of a 32-bit register to fill the top 24 bits + // with the 7th bit). The size of the smaller type is indicated by the + // ExtraValueType in the MVTSDNode for the operator. SIGN_EXTEND_INREG, - ZERO_EXTEND_INREG, // FP_TO_[US]INT - Convert a floating point value to a signed or unsigned // integer. @@ -809,7 +808,6 @@ public: static bool classof(const SDNode *N) { return N->getOpcode() == ISD::SIGN_EXTEND_INREG || - N->getOpcode() == ISD::ZERO_EXTEND_INREG || N->getOpcode() == ISD::FP_ROUND_INREG || N->getOpcode() == ISD::EXTLOAD || N->getOpcode() == ISD::SEXTLOAD || |