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author | Andrew Trick <atrick@apple.com> | 2012-01-14 02:17:15 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2012-01-14 02:17:15 +0000 |
commit | 7ebcaf4cf929ef041ae6c9c07b897e4d0aa8ad06 (patch) | |
tree | e98f2829920175031855dbe17652e1951e2ac2a7 /lib/CodeGen/ScheduleDAGInstrs.h | |
parent | 5e920d7c83c20474fc3470209869978628ccf8da (diff) | |
download | llvm-7ebcaf4cf929ef041ae6c9c07b897e4d0aa8ad06.tar.gz llvm-7ebcaf4cf929ef041ae6c9c07b897e4d0aa8ad06.tar.bz2 llvm-7ebcaf4cf929ef041ae6c9c07b897e4d0aa8ad06.tar.xz |
Move physreg dependency generation into aptly named addPhysRegDeps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148173 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/ScheduleDAGInstrs.h')
-rw-r--r-- | lib/CodeGen/ScheduleDAGInstrs.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/CodeGen/ScheduleDAGInstrs.h b/lib/CodeGen/ScheduleDAGInstrs.h index f393289256..55da5c0818 100644 --- a/lib/CodeGen/ScheduleDAGInstrs.h +++ b/lib/CodeGen/ScheduleDAGInstrs.h @@ -107,6 +107,9 @@ namespace llvm { /// isPostRA flag indicates vregs cannot be present. bool IsPostRA; + /// UnitLatencies flag forces single-cycle data dependencies. + bool UnitLatencies; + /// Defs, Uses - Remember where defs and uses of each register are as we /// iterate upward through the instructions. This is allocated here instead /// of inside BuildSchedGraph to avoid the need for it to be initialized and @@ -205,6 +208,10 @@ namespace llvm { virtual void dumpNode(const SUnit *SU) const; virtual std::string getGraphNodeLabel(const SUnit *SU) const; + + protected: + void addPhysRegDeps(SUnit *SU, unsigned OperIdx); + void addVirtRegDeps(SUnit *SU, unsigned OperIdx); }; } |