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| author | Andrew Trick <atrick@apple.com> | 2014-01-13 20:08:27 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2014-01-13 20:08:27 +0000 |
| commit | de0847d6a5785ca3dd52798ce2341ca94928a1c7 (patch) | |
| tree | abd361573797fa1145a9ac5f29bd6da20277236a /lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | |
| parent | 436f2975ace26abec6a686ef74fec728d5d52aa4 (diff) | |
| download | llvm-de0847d6a5785ca3dd52798ce2341ca94928a1c7.tar.gz llvm-de0847d6a5785ca3dd52798ce2341ca94928a1c7.tar.bz2 llvm-de0847d6a5785ca3dd52798ce2341ca94928a1c7.tar.xz | |
Hide the pre-RA-sched= option.
This is a very confusing option for a feature that will go away.
-enable-misched is exposed instead to help triage issues with the new
scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199133 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 2697a0cc9c..f644fe3d4b 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -213,7 +213,7 @@ MachinePassRegistry RegisterScheduler::Registry; static cl::opt<RegisterScheduler::FunctionPassCtor, false, RegisterPassParser<RegisterScheduler> > ISHeuristic("pre-RA-sched", - cl::init(&createDefaultScheduler), + cl::init(&createDefaultScheduler), cl::Hidden, cl::desc("Instruction schedulers available (before register" " allocation):")); |