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author | Chris Lattner <sabre@nondot.org> | 2006-05-13 02:11:14 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2006-05-13 02:11:14 +0000 |
commit | a2d079a7763d01922e806e7874553da2ae4006af (patch) | |
tree | 5d9f1fcaf0b7b78d0a041803df5579a20af5ac52 /lib/CodeGen | |
parent | 70074e00a2342c2db7bb675a53750db9f4ac59e5 (diff) | |
download | llvm-a2d079a7763d01922e806e7874553da2ae4006af.tar.gz llvm-a2d079a7763d01922e806e7874553da2ae4006af.tar.bz2 llvm-a2d079a7763d01922e806e7874553da2ae4006af.tar.xz |
Merge identical code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28274 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index cf11c97f98..650aaae7df 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3012,14 +3012,6 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) { case ISD::AND: case ISD::OR: case ISD::XOR: - // The input may have strange things in the top bits of the registers, but - // these operations don't care. They may have weird bits going out, but - // that too is okay if they are integer operations. - Tmp1 = PromoteOp(Node->getOperand(0)); - Tmp2 = PromoteOp(Node->getOperand(1)); - assert(Tmp1.getValueType() == NVT && Tmp2.getValueType() == NVT); - Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1, Tmp2); - break; case ISD::ADD: case ISD::SUB: case ISD::MUL: |