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author | Bill Wendling <isanbard@gmail.com> | 2011-03-07 23:38:41 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2011-03-07 23:38:41 +0000 |
commit | 3116dce33840a115130c5f8ffcb9679d023496d6 (patch) | |
tree | 5785ba082080308e283bebd9de4006abfd756360 /lib/Target/ARM/ARMCodeEmitter.cpp | |
parent | 0d8ccaa5c8db820b5b93f37e51563148c57ba6b8 (diff) | |
download | llvm-3116dce33840a115130c5f8ffcb9679d023496d6.tar.gz llvm-3116dce33840a115130c5f8ffcb9679d023496d6.tar.bz2 llvm-3116dce33840a115130c5f8ffcb9679d023496d6.tar.xz |
Rename the narrow shift right immediate operands to "shr_imm*" operands. Also
expand the testing of the narrowing shift right instructions.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127193 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMCodeEmitter.cpp')
-rw-r--r-- | lib/Target/ARM/ARMCodeEmitter.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 853f234f8c..fa7371626f 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -312,11 +312,13 @@ namespace { unsigned getRegisterListOpValue(const MachineInstr &MI, unsigned Op) const { return 0; } - unsigned getNarrowShiftRight16Imm(const MachineInstr &MI, unsigned Op) + unsigned getShiftRight8Imm(const MachineInstr &MI, unsigned Op) const { return 0; } - unsigned getNarrowShiftRight32Imm(const MachineInstr &MI, unsigned Op) + unsigned getShiftRight16Imm(const MachineInstr &MI, unsigned Op) const { return 0; } - unsigned getNarrowShiftRight64Imm(const MachineInstr &MI, unsigned Op) + unsigned getShiftRight32Imm(const MachineInstr &MI, unsigned Op) + const { return 0; } + unsigned getShiftRight64Imm(const MachineInstr &MI, unsigned Op) const { return 0; } /// getMovi32Value - Return binary encoding of operand for movw/movt. If the |