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author | Chris Lattner <sabre@nondot.org> | 2008-01-07 03:13:06 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2008-01-07 03:13:06 +0000 |
commit | 349c4952009525b27383e2120a6b3c998f39bd09 (patch) | |
tree | bc7819e296dc7afa567f6fc31691d31f16381d48 /lib/Target/ARM/ARMInstrInfo.cpp | |
parent | cc8cd0cbf12c12916d4b38ef0de5be5501c8270e (diff) | |
download | llvm-349c4952009525b27383e2120a6b3c998f39bd09.tar.gz llvm-349c4952009525b27383e2120a6b3c998f39bd09.tar.bz2 llvm-349c4952009525b27383e2120a6b3c998f39bd09.tar.xz |
Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45680 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrInfo.cpp')
-rw-r--r-- | lib/Target/ARM/ARMInstrInfo.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index b291d19d86..fa52be8382 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -63,7 +63,7 @@ bool ARMInstrInfo::isMoveInstr(const MachineInstr &MI, return true; case ARM::MOVr: case ARM::tMOVr: - assert(MI.getDesc()->numOperands >= 2 && + assert(MI.getDesc()->getNumOperands() >= 2 && MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && "Invalid ARM MOV instruction"); @@ -201,7 +201,7 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, MachineInstr *MemMI = NULL; unsigned AddrMode = (TSFlags & ARMII::AddrModeMask); const TargetInstrDescriptor *TID = MI->getDesc(); - unsigned NumOps = TID->numOperands; + unsigned NumOps = TID->getNumOperands(); bool isLoad = TID->isSimpleLoad(); const MachineOperand &WB = isLoad ? MI->getOperand(1) : MI->getOperand(0); const MachineOperand &Base = MI->getOperand(2); @@ -897,7 +897,7 @@ unsigned ARM::GetInstSize(MachineInstr *MI) { case ARM::tBR_JTr: { // These are jumptable branches, i.e. a branch followed by an inlined // jumptable. The size is 4 + 4 * number of entries. - unsigned NumOps = TID->numOperands; + unsigned NumOps = TID->getNumOperands(); MachineOperand JTOP = MI->getOperand(NumOps - (TID->isPredicable() ? 3 : 2)); unsigned JTI = JTOP.getIndex(); |