summaryrefslogtreecommitdiff
path: root/lib/Target/ARM/ARMInstrInfo.cpp
Commit message (Expand)AuthorAge
* [C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper2014-03-10
* ARM: Use the PICADD opcode calculated.Jim Grosbach2013-09-10
* ARM: Fix ELF global base reg intialization.Jim Grosbach2013-08-26
* When initializing the PIC global base register on ARM/ELF add pc to fix the a...Benjamin Kramer2013-08-16
* Create a constant pool symbol for the GOT in the ARMCGBR the same way weChandler Carruth2013-07-27
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-07
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-02
* Move TargetData to DataLayout.Micah Villmow2012-10-08
* [arm-fast-isel] Add support for ELF PIC.Jush Lu2012-09-27
* ARM: Define generic HINT instruction.Jim Grosbach2012-06-18
* ARM implement TargetInstrInfo::getNoopForMachoTarget()Jim Grosbach2012-02-28
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-18
* invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We w...Owen Anderson2011-08-26
* Split am2offset into register addend and immediate addend forms, necessary fo...Owen Anderson2011-07-26
* Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A...Evan Cheng2011-07-20
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-28
* Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+o...Evan Cheng2010-11-12
* Convert ARM::MOVi2pieces to a true pseudo-instruction and expand it inJim Grosbach2010-10-29
* Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, likeJim Grosbach2010-10-27
* Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing onJim Grosbach2010-10-27
* First part of refactoring ARM addrmode2 (load/store) instructions to be moreJim Grosbach2010-10-26
* Slightly change the meaning of the reMaterialize target hook when the originalJakob Stoklund Olesen2010-06-02
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-05
* - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.Evan Cheng2009-11-14
* Refactor code.Evan Cheng2009-11-08
* - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relativeEvan Cheng2009-11-06
* Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,...Anton Korobeynikov2009-11-02
* Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate theBob Wilson2009-10-28
* Trim more includes.Evan Cheng2009-10-22
* Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudoEvan Cheng2009-09-28
* Fix thinko in my recent movt commit: it's not safe to remat movt, since it ha...Anton Korobeynikov2009-09-28
* Use movt/movw pair to materialize 32 bit constants on ARMv6T2+.Anton Korobeynikov2009-09-27
* Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.Chris Lattner2009-08-22
* Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster...Evan Cheng2009-08-04
* Move the getInlineAsmLength virtual method from TAI to TII, whereChris Lattner2009-08-02
* - More refactoring. This gets rid of all of the getOpcode calls.Evan Cheng2009-07-28
* More DCE.Evan Cheng2009-07-27
* Get rid of more dead code.Evan Cheng2009-07-27
* Get rid of some more getOpcode calls.Evan Cheng2009-07-27
* Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate m...Evan Cheng2009-07-27
* Change Thumb2 jumptable codegen to one that uses two level jumps:Evan Cheng2009-07-25
* FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructi...Evan Cheng2009-07-24
* Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio...David Goodwin2009-07-24
* Fix frame index elimination to correctly handle thumb-2 addressing modes that...David Goodwin2009-07-23
* Let callers decide the sub-register index on the def operand of rematerialize...Evan Cheng2009-07-16
* Generalize opcode selection in ARMBaseRegisterInfo.David Goodwin2009-07-08
* Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh...David Goodwin2009-07-08
* Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins...David Goodwin2009-07-02
* Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the...Evan Cheng2009-07-01
* Improve Thumb-2 jump table support.David Goodwin2009-06-30