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| author | Dan Gohman <gohman@apple.com> | 2009-02-18 05:45:50 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-02-18 05:45:50 +0000 |
| commit | 97357614b5957cc167c261d3be54713802715d9a (patch) | |
| tree | 55bb4f2595bc761d36928114f203a2c29526a600 /lib/Target/ARM/ARMInstrInfo.cpp | |
| parent | 865f006bb45a609e1cb6acb653af3fe5442ee4dc (diff) | |
| download | llvm-97357614b5957cc167c261d3be54713802715d9a.tar.gz llvm-97357614b5957cc167c261d3be54713802715d9a.tar.bz2 llvm-97357614b5957cc167c261d3be54713802715d9a.tar.xz | |
Factor out the code to add a MachineOperand to a MachineInstrBuilder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64891 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrInfo.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.cpp | 22 |
1 files changed, 4 insertions, 18 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index 9dc0785789..3277896f74 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -509,20 +509,6 @@ bool ARMInstrInfo::copyRegToReg(MachineBasicBlock &MBB, return true; } -static const MachineInstrBuilder &ARMInstrAddOperand(MachineInstrBuilder &MIB, - MachineOperand &MO) { - if (MO.isReg()) - MIB = MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit()); - else if (MO.isImm()) - MIB = MIB.addImm(MO.getImm()); - else if (MO.isFI()) - MIB = MIB.addFrameIndex(MO.getIndex()); - else - assert(0 && "Unknown operand for ARMInstrAddOperand!"); - - return MIB; -} - void ARMInstrInfo:: storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, @@ -567,7 +553,7 @@ void ARMInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc)).addReg(SrcReg, false, false, isKill); for (unsigned i = 0, e = Addr.size(); i != e; ++i) - MIB = ARMInstrAddOperand(MIB, Addr[i]); + MIB.addOperand(Addr[i]); NewMIs.push_back(MIB); return; } @@ -582,7 +568,7 @@ void ARMInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc)).addReg(SrcReg, false, false, isKill); for (unsigned i = 0, e = Addr.size(); i != e; ++i) - MIB = ARMInstrAddOperand(MIB, Addr[i]); + MIB.addOperand(Addr[i]); AddDefaultPred(MIB); NewMIs.push_back(MIB); return; @@ -626,7 +612,7 @@ void ARMInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, Opc = Addr[0].isFI() ? ARM::tRestore : ARM::tLDR; MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg); for (unsigned i = 0, e = Addr.size(); i != e; ++i) - MIB = ARMInstrAddOperand(MIB, Addr[i]); + MIB.addOperand(Addr[i]); NewMIs.push_back(MIB); return; } @@ -640,7 +626,7 @@ void ARMInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg); for (unsigned i = 0, e = Addr.size(); i != e; ++i) - MIB = ARMInstrAddOperand(MIB, Addr[i]); + MIB.addOperand(Addr[i]); AddDefaultPred(MIB); NewMIs.push_back(MIB); return; |